In this paper, we propose a hardware architecture of high-speed sorted QR decomposition for 44 MIMO wireless communication systems. QR decomposition (QRD) is commonly used in many MIMO detection algorithms. In particular, sorted QR decomposition (SQRD) is the advanced algorithm to improve MIMO detection performance. We design an SQRD hardware architecture by using a modified Gram-Schmidt algorithm with pipelining and recursive processing. In addition, we propose an extended architecture which can decompose an augmented channel matrix for MMSE MIMO detection. These architecture can be applied in high-throughput MIMO-OFDM system such as IEEE802.11n which supports data throughput of up to 600 Mbps. We implement the proposed SQRD architecture and the proposed MMSE-SQRD architecture with 179k and 334k gates in 90 nm CMOS technology. These proposed design can achieve a high performance of up to 40.8 and 50.0 million 44 SQRD operations per second with the maximum operating frequency of 245 and 300 MHz.