Cancellation of self interference (SI) is an important technology in order for wireless communication system devices to perform full-duplex communication. In this paper, we propose a novel self-interference cancellation using null beamforming to be applied entire IEEE 802.11 frame including the legacy part for full-duplex wireless communication on Cooperative MIMO (Multiple Input Multiple Output). We evaluate the SI cancellation amount by the proposed method using a field programmable gate array (FPGA) and software defined radio (SDR), and show the experimental results. In the experiment, it is confirmed that the amount of SI cancellation by the proposed method was at least 18dB. The SI cancellation amount can be further potentiated with more accurate CSI (channel state information) by increasing the transmission power. It is shown that SI can be suppressed whole frame which includes legacy preamble part. The proposed method can be applied to next generation wireless communication standards as well.

This paper presents a unified software and hardware wireless AI platform (USHWAP) for developing and evaluating machine learning in wireless systems. The platform integrates multi-software development such as MATLAB and Python with hardware platforms like FPGA and SDR, allowing for flexible and scalable device and edge computing application development. The USHWAP is implemented and validated using FPGAs and SDRs. Wireless signal classification, wireless LAN sensing, and rate adaptation are used as examples to showcase the platform's capabilities. The platform enables versatile development, including software simulation and real-time hardware implementation, offering flexibility and scalability for multiple applications. It is intended to be used by wireless-AI researchers to develop and evaluate intelligent algorithms in a laboratory environment.

In this paper, we propose a pipelined architecture for an equalizer based on the Multilevel Modified Constant Modulus Algorithm (MMCMA). We also provide the correction factor that mathematically converts the proposed pipelined adaptive equalizer into an equivalent non-pipelined conventional MMCMA based equalizer. The proposed method of pipelining uses modules with 6 filter coefficients, resulting in an overall latency of a single sampling period, along the main transmission line. The basic concept of the proposed architecture is to implement the Finite Impulse Response (FIR) filter and the algorithm portion of the adaptive equalizer, such that the critical path of the whole circuit has a maximum of three complex multipliers and three adders.

Conventional subband ADF's (adaptive digital filters) using filter banks have shown a degradation in performance because of the non-ideal nature of filters. To solve this problem, we propose a new type of subband ADF incorporating two types of analysis filter bank. In this paper, we show that we can design the optimum filter bank which minimizes the LMSE (least mean squared error). In other words, we can design a subband ADF with less MSE than that of conventional subband ADF's.

The important problems in IIR adaptive equalizers are stability of the adaptive IIR filters and unimodality in the error surface. In this report we propose a new IIR adaptive equalizer which assures the unimodality and the stability.

In this report, we propose a robust block adaptive digital filter (BADF) which can improve the accuracy of the estimated weights by averaging the adaptive weight vectors. We show that the improvement of the estimated weights is independent of the input signal correlation.

In this letter we verify that a blind adaptive algorithm operating at a low intermediate frequency (Low-IF) can be applied to a system where carrier phase synchronization has not been achieved. We consider a quadrature amplitude shift keyed (QPSK) signal as the transmitted signal, and assume that the orthogonal low intermediate sinusoidal frequency used to generate the transmitted signal is well known. The proposed algorithm combines two algorithms: Namely, the least mean square (LMS) algorithm which has a cost function with unique minimum, and the constant modulus algorithm (CMA), which was first proposed by Godard. By doing this and operating the equalizer at a rate greater than the symbol rate, we take advantage of the variable amplitude of the sub-carriers and the fast convergence of LMS algorithm, so as to achieve a faster convergence speed. When the computer simulation results of the proposed algorithm are compared with the constant modulus algorithm (CMA) and the modified CMA (MCMA), we observed that the proposed algorithm exhibited a faster convergence speed.

Orthogonal frequency division multiplexing (OFDM) is an attractive technique to accomplish wired or wireless broadband communications. Since it has been adopted as the terrestrial digital-video-broadcasting standard in Europe, it has also subsequently been embedded into many broadband communication standards. Many techniques for frame timing and frequency synchronization of OFDM systems have been studied as a result of its increasing importance. We propose a new technique of simultaneously synchronizing frame timing and frequency utilizing matched filters. First, a new short preamble consisting of short sequences multiplied by a DBPSK coded sequence is proposed. Second, we show that the new short preamble results in a new structure for matched filters consisting of a first matched filter, a DBPSK decoder, and a second matched filter. We can avoid the adverse effects of carrier frequency offset (CFO) when frame timing is synchronized because a DBPSK decoder has been deployed between the first and second matched filters. In addition, we show that the CFO can be directly estimated from the peak value of matched filter output. Finally, our simulation results demonstrate that the proposed scheme outperforms the conventional schemes.

Wireless channel emulators are used for the performance evaluation of wireless systems when actual wireless environment test is infeasible. The main contribution of this paper is the design of a MU-MIMO channel emulator capable of sending channel feedback automatically to the access point from the generated channel coefficients after the programmable time duration. This function is used for MU beamforming features of IEEE 802.11ac. The second contribution is the low complexity design of MIMO channel emulator with a single path implementation for all MIMO channel taps. A single path design allows all elements of the MIMO channel matrix to use only one Gaussian noise generator, Doppler filter, spatial correlation channel and Rician fading emulator to minimize the hardware complexity. In addition, single path implementation allows the addition of the feedback channel output with only a few additional non-sequential elements which would otherwise double in a parallel implementation. To demonstrate the functionality of our MU-MIMO channel emulator, we present actual hardware emulator results of MU-BF receive signal constellation on oscilloscope.

An alias free parallel structure for adaptive digital filters (ADF's) is considered. The method utilizes the properties of the Frequency-Sampling Filter (FSF) banks to obtain alias free points in the frequency domain. We propose a new cost function for parallel ADF's. The limiting value analysis of system identification using proposed cost function is given in stochastic sense. It is also shown by simulation examples that we can carry out precise system identification. The cost function is defined in each bin; accordingly, it enables the parallel processing of ADF's.

Mobile video traffic is expected to increase explosively because of the proliferating number of Wi-Fi terminals. An overloaded multiple-input multiple-output (MIMO) technique allows the receiver to implement smaller number of antennas than the transmitter in exchange for degradation in video quality and a large amount of computational complexity for postcoding at the receiver side. This paper proposes a novel linear precoder for high-quality video streaming in overloaded multiuser MIMO systems, which protects visually significant portions of a video stream. A low complexity postcoder is also proposed, which detects some of data symbols by linear detection and the others by a prevoting vector cancellation (PVC) approach. It is shown from simulation results that the combination use of the proposed precoder and postcoder achieves higher-quality video streaming to multiple users in a wider range of signal-to-noise ratio (SNR) than a conventional unequal error protection scheme. The proposed precoder attains 40dB in peak signal-to-noise ratio even in poor channel conditions such as the SNR of 12dB. In addition, due to the stepwise acquisition of data symbols by means of linear detection and PVC, the proposed postcoder reduces the number of complex additions by 76% and that of multiplications by 64% compared to the conventional PVC.

In this paper, we propose a CUDA implementation of DWT for JPEG 2000 codec. We show that the performance of JPEG 2000 codec implemented by CUDA is better than CPU based implementation. The performance of the DWT implemented by CUDA is achieved 27.7 frame/second in 4K digital cinema.

In this paper, we propose a new structure of blind equalizer and its cost function. The proposed cost function is a quadratic form and has the unique solution. In addition, the proposed scheme can employ iterative algorithms which achieve less computational complexity and can be easily realized in real time processing. In order to verify the effectiveness of the proposed schemes, several computer simulations including a 64-QAM signal equalization have been shown.

We propose a new method of progressive transmission of continuous tone images using multi-level error diffusion method. Assuming that the pixels are ordered and the error is diffused to later pixels, multi-level error-diffused images are resolved into a multiple number of bit planes. In an image with 8 bits per pixel, the number of the bit planes that we construct is 9, and the 2-level, 3-level, 5-level,, error-diffused images are produced by a successive use of the bit planes. The original image is finally achieved precisely.

This paper presents a fast convergence block adaptive filter in which the filter weights are adjusted based on the conjugate gradient method. The proposed algorithm permits the use of the fast convolution in accordance with the overlapsave method using the FFT, so that it can reduce the computational complexity to O(N log N + N) for N taps FIR filters. Some computer simulations show the faster convergence property of the proposed method than the conventional algorithms such as well-known LMS type techniques.

In case of the system identification problem, such as an echo canceller, estimated impulse response obtained by the frequency-domain adaptive filter based on the circular convolution has estimation error because the unknown system is based on the linear convolution in the time domain. In this correspondence, we consider a sufficient condition to reduce the estimation error.

This paper presents a fast and systematic architecture exploration method that realizes an efficient IEEE 802.11e based hardware/software co-design Medium Access Control (MAC) system architecture, which can achieve near theoretical MAC throughput for burst data transmission while complying with strict channel access time requirements. Our design approach uses SystemC based Transaction Level Modeling (TLM) framework to integrate reconfigurable general purpose computing and communication resources into the application model for rapid evaluation of core parameters, system performance, and application specific optimizations. As a result, a MAC system architecture that achieves a simulated MAC throughput of more than 100 Mbps when transmitted at 260 Mbps of Physical Layer (PHY) data rate is obtained. This result is verified with X-X-IMPLEMENTATION on a Xilinx Field-Programmable Gate Array (FPGA) board.

Conventional algorithms for the joint estimation of carrier frequency offset (CFO) and I/Q imbalance no longer work when the I/Q imbalance depends on the frequency. In order to correct the imbalance across many frequencies, the compensator needed is a filter as opposed to a simple gain and phase compensator. Although, algorithms for estimating the optimal coefficients of this filter exist, their complexity is too high for hardware implementation. In this paper we present a new low complexity algorithm for joint estimation of CFO and frequency dependent I/Q imbalance. For the first part, we derive the estimation scheme using the linear least squares algorithm and examine its floating point performance compared to conventional algorithms. We show that the proposed algorithm can completely eliminate BER floor caused by CFO and I/Q imbalance at a lesser complexity compared to conventional algorithms. For the second part, we examine the hardware complexity in fixed point hardware and latency of the proposed algorithm. Based on BER performance, the circuit needs a wordlength of at least 16 bits in order to properly estimate CFO and I/Q imbalance. In this configuration, the circuit is able to achieve a maximum speed of 115.9 MHz in a Virtex 5 FPGA.