This paper deals with our works on developing a high-throughput wireless LAN using a group layered space-time (GLST) system with low-complexity MIMO decoder. It achieves the throughput of 600 Mbps for 30 meter propagation distance by utilizing 80 MHz bandwidth in the 5 GHz frequency band. Run test under channel model B of IEEE802.11TGn demonstrates its excellent performance. The register transfer level results show that the developed system is synthesized successfully and the prototyping in the target FPGA chips of Stratix II EP2S180F1508C4 gives the expected results.

In this paper, we propose a modified Tomlinson Harashima precoding (THP) method with less increase of computational complexity for the multi-user MIMO downlink system. The proposed THP scheme minimizes the influence of noise enhancement at the receivers by placing the diagonal weighted filters at both transmitter side and receiver side with square root. Compared to previously proposed non-linear precoding methods including vector perturbation (VP), the proposed THP achieves high BER performance. Furthermore, we show that the proposed THP method is implemented with lower computational complexity than that of existing modified THP and VP in literature.

This work presents the exact outage performance and throughput of two-way cognitive decode-and-forward relaying wireless sensor networks with realistic transceiver relay. The relay is a self-powered wireless node that harvests radio frequency energy from the transmitted signals. We consider four configurations of a network with formed by combining two bidirectional relaying protocols (multiple access broadcast protocol and time division broadcast protocol), and two power transfer policies (dual-source energy transfer and single-fixed-source energy transfer). Based on our analysis, we provide practical insights into the impact of transceiver hardware impairments on the network performance, such as the fundamental capacity ceiling of the network with various configurations that cannot be exceeded by increasing transmit power given a fixed transmission rate and the transceiver selection strategy for the network nodes that can optimize the implementation cost and performance tradeoff.

This paper presents discussion about channel fluctuation on channel estimation in digital terrestrial television broadcasting. This channel estimation uses a two-dimensional (2D) filter. In our previous work, only a structure of a lattice is considered for generation of nonrectangular 2D filter. We investigate generation of nonrectangular 2D filter with adaptive method, because we should refer to not only a lattice but also channel conditions. From the computer simulations, we show that bit error rate of the proposed filter is improved compared to that of the filter depending on only lattices.

In this paper, we propose a hardware architecture of high-speed sorted QR decomposition for 44 MIMO wireless communication systems. QR decomposition (QRD) is commonly used in many MIMO detection algorithms. In particular, sorted QR decomposition (SQRD) is the advanced algorithm to improve MIMO detection performance. We design an SQRD hardware architecture by using a modified Gram-Schmidt algorithm with pipelining and recursive processing. In addition, we propose an extended architecture which can decompose an augmented channel matrix for MMSE MIMO detection. These architecture can be applied in high-throughput MIMO-OFDM system such as IEEE802.11n which supports data throughput of up to 600 Mbps. We implement the proposed SQRD architecture and the proposed MMSE-SQRD architecture with 179k and 334k gates in 90 nm CMOS technology. These proposed design can achieve a high performance of up to 40.8 and 50.0 million 44 SQRD operations per second with the maximum operating frequency of 245 and 300 MHz.

Two-dimensional (2-D) adaptive digital filters (ADFs) for 2-D signal processing have become a fascinating area of the adaptive signal processing. However, conventional 2-D FIR ADF's require a lot of computations. For example, the TDLMS requires 2N2 multiplications per pixel. We propose a new 2-D adaptive filter using the FFTs. The proposed adaptive filter carries out the fast convolution using overlap-save method, and has parallel structure. Thus, we can reduce the computational complexity to O(log2N) per pixel.

High-resolution image and video communication in home networks is highly expected to proliferate with the spread of Wi-Fi devices and the introduction of multiple-input multiple-output (MIMO) systems. This paper proposes a joint transmission and coding scheme for broadcasting high-resolution video streams over multiuser MIMO systems with an eigenbeam-space division multiplexing (E-SDM) technique. Scalable video coding makes it possible to produce the code stream comprised of multiple layers having unequal contribution to image quality. The proposed scheme jointly assigns the data of scalable code streams to subcarriers and spatial streams based on their signal-to-noise ratio (SNR) values in order to transmit visually important data with high reliability. Simulation results show that the proposed scheme surpasses the conventional unequal power allocation (UPA) approach in terms of both peak signal-to-noise ratio (PSNR) of received images and correct decoding probability. PSNR performance of the proposed scheme exceeds 35dB with the probability of over 95% when received SNR is higher than 6dB. The improvement in average PSNR by the proposed scheme compared to the conventional UPA comes up to approx. 20dB at received SNR of 6dB. Furthermore, correct decoding probability reaches 95% when received SNR is greater than 4dB.

Thanks to the achievements in wireless technology, maximum data rate of wireless LAN systems was rapidly increased recently. As a key part of the WEP and the WPA security for the wireless LAN system, throughput of RC4 must be significantly improved also. This paper proposes two high throughput RC4 architectures. The first one is a RAM-based RC4 using a single of 256-byte tri-port RAM to store the S-box. The core generates 4bits of ciphering key per clock cycle. This paper also proves that 4bits/cycle is the maximum throughput can be achieved by a RAM-based RC4 circuit. The second architecture is a Register-based M-byte RC4 that uses a set of registers to store the S-box. It is able to generate multiple bytes of ciphering key per clock cycle, and is proposed as a novel solution for designing extremely high throughput RC4 core for future WLAN systems. Base on this proposal, a 4-byte RC4 core is developed (M=4). The synthesis results in 90nm ASIC show that: As the same throughput's requirement, the proposed RAM-based and Register-based RC4 can respectively save 60% and 50% of power consumption as compare to that of the most recently works. Moreover, the proposed Register-based design is the best candidate for achieving high throughput at low frequency.

Cancellation of self interference (SI) is an important technology in order for wireless communication system devices to perform full-duplex communication. In this paper, we propose a novel self-interference cancellation using null beamforming to be applied entire IEEE 802.11 frame including the legacy part for full-duplex wireless communication on Cooperative MIMO (Multiple Input Multiple Output). We evaluate the SI cancellation amount by the proposed method using a field programmable gate array (FPGA) and software defined radio (SDR), and show the experimental results. In the experiment, it is confirmed that the amount of SI cancellation by the proposed method was at least 18dB. The SI cancellation amount can be further potentiated with more accurate CSI (channel state information) by increasing the transmission power. It is shown that SI can be suppressed whole frame which includes legacy preamble part. The proposed method can be applied to next generation wireless communication standards as well.

This paper presents a unified software and hardware wireless AI platform (USHWAP) for developing and evaluating machine learning in wireless systems. The platform integrates multi-software development such as MATLAB and Python with hardware platforms like FPGA and SDR, allowing for flexible and scalable device and edge computing application development. The USHWAP is implemented and validated using FPGAs and SDRs. Wireless signal classification, wireless LAN sensing, and rate adaptation are used as examples to showcase the platform's capabilities. The platform enables versatile development, including software simulation and real-time hardware implementation, offering flexibility and scalability for multiple applications. It is intended to be used by wireless-AI researchers to develop and evaluate intelligent algorithms in a laboratory environment.

In this paper, we propose a pipelined architecture for an equalizer based on the Multilevel Modified Constant Modulus Algorithm (MMCMA). We also provide the correction factor that mathematically converts the proposed pipelined adaptive equalizer into an equivalent non-pipelined conventional MMCMA based equalizer. The proposed method of pipelining uses modules with 6 filter coefficients, resulting in an overall latency of a single sampling period, along the main transmission line. The basic concept of the proposed architecture is to implement the Finite Impulse Response (FIR) filter and the algorithm portion of the adaptive equalizer, such that the critical path of the whole circuit has a maximum of three complex multipliers and three adders.

Conventional subband ADF's (adaptive digital filters) using filter banks have shown a degradation in performance because of the non-ideal nature of filters. To solve this problem, we propose a new type of subband ADF incorporating two types of analysis filter bank. In this paper, we show that we can design the optimum filter bank which minimizes the LMSE (least mean squared error). In other words, we can design a subband ADF with less MSE than that of conventional subband ADF's.

The important problems in IIR adaptive equalizers are stability of the adaptive IIR filters and unimodality in the error surface. In this report we propose a new IIR adaptive equalizer which assures the unimodality and the stability.

In this report, we propose a robust block adaptive digital filter (BADF) which can improve the accuracy of the estimated weights by averaging the adaptive weight vectors. We show that the improvement of the estimated weights is independent of the input signal correlation.

In this letter we verify that a blind adaptive algorithm operating at a low intermediate frequency (Low-IF) can be applied to a system where carrier phase synchronization has not been achieved. We consider a quadrature amplitude shift keyed (QPSK) signal as the transmitted signal, and assume that the orthogonal low intermediate sinusoidal frequency used to generate the transmitted signal is well known. The proposed algorithm combines two algorithms: Namely, the least mean square (LMS) algorithm which has a cost function with unique minimum, and the constant modulus algorithm (CMA), which was first proposed by Godard. By doing this and operating the equalizer at a rate greater than the symbol rate, we take advantage of the variable amplitude of the sub-carriers and the fast convergence of LMS algorithm, so as to achieve a faster convergence speed. When the computer simulation results of the proposed algorithm are compared with the constant modulus algorithm (CMA) and the modified CMA (MCMA), we observed that the proposed algorithm exhibited a faster convergence speed.

Orthogonal frequency division multiplexing (OFDM) is an attractive technique to accomplish wired or wireless broadband communications. Since it has been adopted as the terrestrial digital-video-broadcasting standard in Europe, it has also subsequently been embedded into many broadband communication standards. Many techniques for frame timing and frequency synchronization of OFDM systems have been studied as a result of its increasing importance. We propose a new technique of simultaneously synchronizing frame timing and frequency utilizing matched filters. First, a new short preamble consisting of short sequences multiplied by a DBPSK coded sequence is proposed. Second, we show that the new short preamble results in a new structure for matched filters consisting of a first matched filter, a DBPSK decoder, and a second matched filter. We can avoid the adverse effects of carrier frequency offset (CFO) when frame timing is synchronized because a DBPSK decoder has been deployed between the first and second matched filters. In addition, we show that the CFO can be directly estimated from the peak value of matched filter output. Finally, our simulation results demonstrate that the proposed scheme outperforms the conventional schemes.

Wireless channel emulators are used for the performance evaluation of wireless systems when actual wireless environment test is infeasible. The main contribution of this paper is the design of a MU-MIMO channel emulator capable of sending channel feedback automatically to the access point from the generated channel coefficients after the programmable time duration. This function is used for MU beamforming features of IEEE 802.11ac. The second contribution is the low complexity design of MIMO channel emulator with a single path implementation for all MIMO channel taps. A single path design allows all elements of the MIMO channel matrix to use only one Gaussian noise generator, Doppler filter, spatial correlation channel and Rician fading emulator to minimize the hardware complexity. In addition, single path implementation allows the addition of the feedback channel output with only a few additional non-sequential elements which would otherwise double in a parallel implementation. To demonstrate the functionality of our MU-MIMO channel emulator, we present actual hardware emulator results of MU-BF receive signal constellation on oscilloscope.

An alias free parallel structure for adaptive digital filters (ADF's) is considered. The method utilizes the properties of the Frequency-Sampling Filter (FSF) banks to obtain alias free points in the frequency domain. We propose a new cost function for parallel ADF's. The limiting value analysis of system identification using proposed cost function is given in stochastic sense. It is also shown by simulation examples that we can carry out precise system identification. The cost function is defined in each bin; accordingly, it enables the parallel processing of ADF's.