The operation of analog circuits from ultra low supply voltages becomes necessary due to semiconductor technology scaling. Yet traditional design techniques cannot be used. In this paper, we review techniques that allow analog circuits to operate with supply voltages as low as 0.5 V. Biasing considerations are given, and robust bias circuits are discussed. For frequency-tunable circuits, a low-voltage MOS varactor tuning technique is presented. The techniques discussed are applied to two different OTA topologies, as well as to an automatically tuned, fifth-order active RC filter. This material is largely based on the work of the authors as described in [1]-[5].

An ultra low voltage CMOS pass-gate logic using body-bias controlled SOI MOSFETs has been developed. The logic is composed of gate-body connected SOI pass-gates and a CMOS buffer with the body-bias controlled by the complementary double-rail input. The full-adder using the proposed logic improved the lowest operation voltage by 27%, compared with the SOI CPL (Complementary Pass-Gate Logic). For a 16 16 bit multiplier, the power-delay product achieved 70 pJ (including 50 pF I/O) at 0.5 V power supply, which was more than 1 order of magnitude improvement over the bulk CPL.