To address the bandwidth bottleneck that exists between LSI chips, we have proposed a novel, high-sensitivity receiver circuit for differential optical transmission on a silicon optical interposer. Both anodes and cathodes of the differential photodiodes (PDs) were designed to be connected to a transimpedance amplifier (TIA) through coupling capacitors. Reverse bias voltage was applied to each of the differential PDs through load resistance. The proposed receiver circuit achieved double the current signal amplitude of conventional differential receiver circuits. The frequency response of the receiver circuit was analyzed using its equivalent circuit, wherein the temperature dependence of the PD was implemented. The optimal load resistances of the PDs were determined to be 5kΩ by considering the tradeoff between the frequency response and bias voltage drop. A small dark current of the PD was important to reduce the voltage drop, but the bandwidth degradation was negligible if the dark current at room temperature was below 1µA. The proposed circuit achieved 3-dB bandwidths of 18.9 GHz at 25°C and 13.7 GHz at 85°C. Clear eye openings in the TIA output waveforms for 25-Gbps 27-1 pseudorandom binary sequence signals were obtained at both temperatures.

A transceiver macro for high-speed data transmission via cable in vehicles is proposed. The transceiver uses ac coupling and bi-directional interface topology for protecting LSIs against unexpected short of cable and harness/chassis and has a spread-spectrum-clocking (SSC) generator that reduces noise due to electromagnetic interference. A driver current control has been used for fast switching of data direction on ac-coupled interfaces. An adaptive bandwidth control has been used in a Δ ∑ PLL to improve SCC significantly. A test chip has been fabricated and shows stable and bi-directional data communication with data rate of 162 to 972 Mbps through 20-m cable. Thanks to an optimum calibration of the SSC-PLL bandwidth, it reduces peak power at 33 kHz by -23 dB and provides 2% modulation at a data rate of 810 Mbps.