While social media is now used by many people and plays a role in distributing information, it has recently created an unexpected problem: the actual shrinkage of information sources. This is mainly due to the ease of connecting people with similar opinions and the recommendation system. Biased information distribution promotes polarization that divides people into multiple groups with opposing views. Also, people may receive only the seemingly positive information that they prefer, or may trigger them into holding onto their opinions more strongly when they encounter opposing views. This, combined with the characteristics of social media, is accelerating the polarization of opinions and eventually social division. In this paper, we propose a model of opinion formation on social media to simulate polarization. While based on the idea that opinion neutrality is only relative, this model provides new techniques for dealing with polarization.

We propose a non-photorealistic rendering method for generating edge-preserving bubble images from gray-scale photographic images. Bubble images are non-photorealistic images embedded in many bubbles, and edge-preserving bubble images are bubble images where edges in photographic images are preserved. The proposed method is executed by an iterative processing using absolute difference in window. The proposed method has features that processing is simple and fast. To validate the effectiveness of the proposed method, experiments using various photographic images are conducted. Results show that the proposed method can generate edge-preserving bubble images by preserving the edges of photographic images and the processing speed is high.

In this paper, we consider the stack layout of the bubble-sort graph. The bubble-sort graph is a type of Cayley graph on a symmetric group; the bubble-sort graph has an important role for the study of Cayley graphs as interconnection networks. The stack layout and the queue layout problem that are treated in this paper have been studied widely. In this paper, we show that the stack number of the bubble-sort graph BS(n) is either n-1 or n-2. In addition, we show that an upper bound of the queue number of BS(n) is n-2.

This study investigates quasiperiodic bifurcations generated in a coupled delayed logistic map. Since a delayed logistic map generates an invariant closed curve (ICC), a coupled delayed logistic map exhibits an invariant torus (IT). In a parameter region generating IT, ICC-generating regions extend in many directions like a web. This bifurcation structure is called an Arnol'd resonance web. In this study, we investigate the bifurcation structure of Chenciner bubbles, which are complete synchronization regions in the parameter space, and illustrate a complete bifurcation set for one of Chenciner bubbles. The bifurcation boundary of the Chenciner bubbles is surrounded by saddle-node bifurcation curves and Neimark-Sacker bifurcation curves.

A simplified algorithm for check node processing of extended min-sum (EMS) q-ary LDPC decoders is presented in this letter. Compared with the bubble check algorithm, the so-called dynamic bubble-check (DBC) algorithm aims to further reduce the computational complexity for the elementary check node (ECN) processing. By introducing two flag vectors in ECN processing, The DBC algorithm can use the minimum number of comparisons at each step. Simulation results show that, DBC algorithm uses significantly fewer comparison operations than the bubble check algorithm, and presents no performance loss compared with standard EMS algorithm on AWGN channels.

Low-density parity-check (LDPC) codes are typically designed to avoid the length-4 cycles to ensure acceptable levels of performance. However, the turbo equalization, which relies on an interaction between an inner code such as an LDPC code and a soft-output Viterbi algorithm (SOVA) detector, exhibits a performance degradation due to the pseudo cycles. In this paper, we propose an interleaved modified array code (IMAC) that can reduce the number of pseudo cycles, hence, improving the gains from the iterative processing technique. The modification is made on the existing array-based LDPC codes named modified array codes (MAC) by introducing an additional interleaving matrix to the parity-check matrix. Simulation results on the perpendicular magnetic recording channels (PMRC) demonstrate that the IMAC outperforms both the MAC and the previously proposed random interleave array (RIA) codes for the partial-response targets under consideration. In addition, a subblock-based encoder design is proposed to reduce the encoding complexity of the IMAC and when compared with the RIA code, the IMAC exhibits a lower encoding complexity, and still maintains a comparable level of the decoding complexity.

Frequency-domain equalization (FDE) has been studied for suppressing inter-symbol interference (ISI) due to frequency selective fading in single carrier systems. When a high-mobility terminal is assumed in the system, channel transition within an FDE block cannot be ignored. The ISI reduction performance of FDE degrades since the cyclicity of the channel matrix is lost. To solve this problem, a method of dividing the received data block into multiple subblocks has been proposed, where pseudo cyclic prefix (CP) processing is introduced to realize periodicity in each subblock. In this method, the performance is degraded by the inherently-inaccurate pseudo CP. In this paper, we study the application of frequency-domain turbo equalization (FDTE) to subblock processing for improving the accuracy of pseudo CP. The simulation results show that FDTE with subblock processing yields remarkable performance improvements.

Bubble-sort graphs are variants of Cayley graphs. A bubble-sort graph is suitable as a topology for massively parallel systems because of its simple and regular structure. Therefore, in this study, we focus on n-bubble-sort graphs and propose an algorithm to obtain n-1 disjoint paths between two arbitrary nodes in time bounded by a polynomial in n, the degree of the graph plus one. We estimate the time complexity of the algorithm and the sum of the path lengths after proving the correctness of the algorithm. In addition, we report the results of computer experiments evaluating the average performance of the algorithm.

Large liquid crystal display (LCD) panels have several cell-gap problems. For example, gravity defects are observed as thicker cell-gap areas at the bottom of an LCD panel at a high temperature, and cold-bubble defects are observed as bubbles in an LCD panel at a low temperature. We have developed a gap simulation to investigate these problems. The calculation was carried out for both column and ball spacers. It was shown that gap defects can be substantially reduced using ball spacers.

Incremental modification and optimization in VLSI physical design is of fundamental importance. Based on the O-tree (ordered tree) representation which has more prominent advantages in comparison with other topological representations of non-slicing floorplans, in this paper, we present an incremental placement algorithm for BBL (Building Block Layout) design in VLSI physical design. The good performance of experimental results in dealing with some instances proves the effectiveness of our algorithm.

This paper investigates a relationship between inkdot and one-pebble for two-dimensional finite automata (2-fa's). Especially we show that (1) alternating inkdot 2-fa's are more powerful than nondeterministic one-pebble 2-fa's, and (2) there is a set accepted by an alternating inkdot 2-fa, but not accepted by any alternating one-pebble 2-fa with only universal states.

This paper investigates closure properties of one-pebble Turing machines with sublogarithmic space. It shows that for any function log log n L(n) = o(log n), neither of the classes of languages accepted by L(n) space-bounded deterministic and self-verifying nondeterministic one-pebble Turing machines is closed under concatenation, Kleene closure, and length-preserving homomorphism.

A very low-power, high-speed flash A/D converter front-end composed of a new latched comparator was developed. We established a butterfly sorting technique to guarantee the monotonicity of the converter. The 6-bit A/D front-end achieves a speed of 100 Msps and dynamic range of 33 dB with power consumption of only 7 mW at the supply voltage of 1 V, and the butterfly sorter guarantees 6-bit monotonicity with an extra power consumption of 1 mW.

While superpages are an efficient solution to increase TLB reach, strong contraint for using superpages hinders the actual utilization. Two previous solutions, a partial-subblock TLB and the shadow memory were proposed to loose the contraint. A partial-subblock TLB looses only a small portion of the contraint and limits the superpage size at a cost. The shadow memory looses most of the constraint but introduces other serious problems. We propose three novel approaches to improve superpage supports. First, we propose a hybrid scheme which integrates both the shadow memory and a partial-subblock TLB, thereby enjoying the benefits inherited from both sides. The hybrid scheme has as high a superpage utilization as the shadow memory, and avoids most of the problems in the shadow memory by the virtue of partial-subblock TLB. Second, VS-TLBs are an extension of subblock TLBs to support multiple page subblocks, while subblock TLBs can support only single page subblocks. VS-TLBs have a much larger TLB reach than subblock TLBs with a cost of a small number of bits. Last, we propose VS-hybrid which replaces the partial-subblock TLB in the hybrid scheme with a partial VS-TLB. It supports multiple page subblocks in the hybrid scheme. Therefore, it takes both advantages of the hybrid scheme and the expanded subblock size. The simulation results show that the proposed schemes take a large amount of performance gain in the benchmark application programs.

In this paper we propose a heterogeneous agents model that represents speculative dynamics by using the synergetic approach. We consider the markets for three securities (a stock, a bond, and a foreign currency). Each market consists of two typical types of investors: fundamentalists and bandwagon traders. We show the characteristic patterns of speculative prices (speculative bubbles and speculative chaos) which are generated by trading between the fundamentalists and bandwagon traders.

This paper investigates a relationship between accepting powers of two-way deterministic one-counter automata and one-pebble off-line deterministic Turing machines operating in space between loglog n and log n, and shows that they are incomparable.

Some problems in formal language theory are considered and are shown to be deterministic exponential time complete. They include the problems for a given context-free grammar G, a nondeterministic finite automaton M, a deterministic pushdown automaton MD, of determining whether L(G)L(M), and whether L(MD)L(M). Polynomial time reductions are presented from the pebble game problem, known to be deterministic exponential time complete, to each of these problems.