With the flourish of applications based on the Internet of Things (IoT), privacy issues have been attracting a lot of attentions. Although the concept of privacy homomorphism was proposed along with the birth of the well-known RSA cryptosystems, cryptographers over the world have spent about three decades for finding the first implementation of the so-called fully homomorphic encryption (FHE). Despite of, currently known FHE schemes, including the original Gentry's scheme and many subsequent improvements as well as the other alternatives, are not appropriate for IoT-oriented applications because most of them suffer from the problems of inefficient key size and noisy restraining. In addition, for providing fully support to IoT-oriented applications, symmetric fully homomorphic encryptions are also highly desirable. This survey presents an analysis on the challenges of designing secure and practical FHE for IoT, from the perspectives of lightweight requirements as well as the security requirements. In particular, some issues about designing noise-free FHE schemes would be addressed.

Malware phylogeny refers to inferring evolutionary relationships between instances of families. It has gained a lot of attention over the past several years, due to its efficiency in accelerating reverse engineering of new variants within families. Previous researches mainly focused on tree-based models. However, those approaches merely demonstrate lineage of families using dendrograms or directed trees with rough evolution information. In this paper, we propose a novel malware phylogeny construction method taking advantage of persistent phylogeny tree model, whose nodes correspond to input instances and edges represent the gain or lost of functional characters. It can not only depict directed ancestor-descendant relationships between malware instances, but also show concrete function inheritance and variation between ancestor and descendant, which is significant in variants defense. We evaluate our algorithm on three malware families and one benign family whose ground truth are known, and compare with competing algorithms. Experiments demonstrate that our method achieves a higher mean accuracy of 61.4%.

We propose a QoS scheme for ad hoc networks by combining TDMA and IEEE 802.11 DCF, and present performance evaluation results of the scheme. In the proposed scheme, the channel time is composed of two different periods, specifically TDMA period and DCF period. The TDMA period provides contention free transmission opportunities for QoS flows, and the DCF period provides contention-based access for best effort or low priority flows. We evaluate the proposed scheme for various numbers of TCP flows and different CBR data rates with QualNet simulator. Simulation results show that the protocol is able to provide an efficient solution for QoS control in ad hoc networks.

This paper presents an efficient algorithm for incremental buffer insertion and module resizing for a full-placed floorplan. Our algorithm offers a method to use the white space in a given floorplan to resize modules and insert buffers, and at the same time keeps the resultant floorplan as close to the original one as possible. Both the buffer insertion and module resizing are modeled as geometric programming problems, and can be solved extremely efficiently using new developed solution methods. The experimental results suggest that the the wire length difference between the initial floorplan and result are quite small (less than 5%), and the global structure of the initial floorplan are preserved very well.

Malware phylogeny refers to inferring the evolutionary relationships among instances of a family. It plays an important role in malware forensics. Previous works mainly focused on tree-based model. However, trees cannot represent reticulate events, such as inheriting code fragments from different parents, which are common in variants generation. Therefore, phylogenetic networks as a more accurate and general model have been put forward. In this paper, we propose a novel malware phylogenetic network construction method based on splits graph, taking advantage of the one-to-one correspondence between reticulate events and netted components in splits graph. We evaluate our algorithm on three malware families and two benign families whose ground truth are known and compare with competing algorithms. Experiments demonstrate that our method achieves a higher mean accuracy of 64.8%.

The traditional spectrum auctions require a central auctioneer. Then, the secondary users (SUs) can bid for spectrum in multiple auction or sealed auction way. In this paper, we address the problem of distributed spectrum sharing in the cognitive networks where multiple owners sell their spare bands to multiple SUs. Each SU equips multi-interface/multi-radio, so that SU can buy spare bands from multiple owners. On the other hand, each owner can sell its spare bands to serval SUs. There are two questions to be addressed for such an environment: the first one is how to select bands/the owners for each SU; the second one is how to decide the competitive prices for the multiple owners and multiple SUs. To this end, we propose a two-side multi-band market game theoretic framework to jointly consider the benefits of all SUs and owners. The equilibrium concept in such games is named core. The outcomes in the core of the game cannot be improved upon by any subset of players. These outcomes correspond exactly to the price-lists that competitively balance the benefits of all SUs and owners. We show that the core in our model is always non-empty. When the measurement of price takes discrete value, the core of the game is defined as discrete core. The Dynamic Multi-band Sharing algorithm (DMS) is proposed to converge to the discrete core of the game. With small enough measurement unit of price, the algorithm can achieve the optimal performance compared with centralized one in terms of the system utility.

Temperature-tracking is becoming of paramount importance in modern electronic design automation tools. In this paper, we present a deterministic thermal placement algorithm for standard cell based layout which can lead to a smooth temperature distribution over the die. It is mainly based on Fiduccia-Mattheyses partition scheme and a former substrate thermal model that can convert the known temperature constraints into the corresponding power distribution constraints. Moreover, a kind of force-directed heuristic based on cells' power consumption is introduced in the above process. Experimental results demonstrate a comparatively uniform temperature distribution and show a reduction of the maximal temperature on the die.

To eliminate casting shadows of moving objects, which cause difficulties in vision applications, a novel method is proposed based on Visual background extractor by altering its updating mechanism using relevant spatiotemporal information. An adaptive threshold and a spatial adjustment are also employed. Experiments on typical surveillance scenes validate this scheme.

Using a self-developed ASTM test system of contact material electrical properties under low voltage (LV), small-capacity, the current-frequency variable and a photoelectric analytical balance, the electric performance comparison experiments and material weighing of silver-based electrical contact materials, such as silver/tungsten and silver/cadmium oxide contact materials, are completed under LV, pure resistive load and small current at 400 Hz/50 Hz. The surface profiles and constituents of silver/tungsten contact material were observed and analyzed by SEM and EDAX. Researches indicate that the form of the contact material arc burnout at 400 Hz is stasis, not an eddy flow style at 50 Hz; meanwhile, the area of the contact burnout at 400 Hz is less than that of 50 Hz, and the local ablation on the surface layer at 400 Hz is more serious. Comparing the capacities of the silver-based contact materials with different second element such as CAgW50, CAgNi10, CAgC4 and CAgCdO15 at 400 Hz, no matter what the performances of arc erosion resistance or welding resistance, it can be found that the capacities of the silver/tungsten material is the best.

In this paper, we design an Unequal Error Protection (UEP) rateless code with special coding graph and apply it to propose a novel HTTP adaptive streaming based on UEP rateless code (HASUR). Our designed UEP rateless code provides high diversity on decoding probability and priority for data in different important level with overhead smaller than 0.27. By adopting this UEP rateless channel coding and scalable video source coding, our HASUR ensures symbols with basic quality to be decoded first to guarantee fluent playback experience. Besides, it also provides multiple layers to ensure the most suitable quality for fluctuant bandwidth and packet loss rate (PLR) without estimating them in advance. We evaluate our HASUR against the alternative solutions. Simulation results show that HASUR provides higher video quality and more adapts to bandwidth and PLR than other two commercial schemes under End-to-End transmission.

An optical fiber humidity sensor was fabricated forming a nanometer-scale Fabry-Perot interferometer by using the Ionic Self-Assembly Monolayer (ISAM) method. The materials used were Poly R-478 and poly(diallyldimethyl ammonium chloride). Taking advantage of the precision that the ISAM method can achieve in controlling the length of the nano cavity, the length was fit to obtain a maximum variation of 8.7 dB of reflected optical power between 11.3% and 85% RH. The sensor exhibited a fast response time and was able to monitor the human breathing.

In this paper we focus on the numerical simulation of the mixing behaviors of distributed superconducting junction arrays at 1.2 THz. A novel type of superconducting tunnel junctions, i.e., NbN/AlN/Nb, which have a relatively high gap voltage (4.3 mV) and can reach a critical current density as high as several tens of kA/cm2, are proposed for this characterization along with conventional Nb/AlOx/Nb junctions. The former is incorporated with a NbN/SiO2/Al tuning circuit, and the latter with a Nb/SiO2/Al and a NbTiN/SiO2/Al tuning circuits. The noise performance, local-oscillator power requirement, IF bandwidth, and optimum embedding impedance are thoroughly characterized for the two types of distributed superconducting junction arrays.

The rising systems programming language Rust is fast, efficient and memory safe. However, improperly dereferencing raw pointers in Rust causes new safety problems. In this paper, we present a detailed analysis into these problems and propose a practical hybrid approach to detecting unsafe raw pointer dereferencing behaviors. Our approach employs pattern matching to identify functions that can be used to generate illegal multiple mutable references (We define them as thief function) and instruments the dereferencing operation in order to perform dynamic checking at runtime. We implement a tool named UnsafeFencer and has successfully identified 52 thief functions in 28 real-world crates*, of which 13 public functions are verified to generate multiple mutable references.

As CMOS devices scaling down in nowadays integrated circuits, the impact of layout-dependent effects (LDEs) to circuit performances becomes to be significant. This paper mainly focuses on LDE-aware analog circuit synthesis. Our circuit synthesis follows an optimization framework of transistor sizing based on geometric programming (GP) in which analog circuit performances are formulated in terms of monomials and posynomials. Providing GP models for the LDEs such as the shallow trench isolation (STI) stress and the well proximity effect (WPE), we can generate layout constraints related to LDEs during the circuit synthesis. Applying our circuit synthesis to a typical two-stage op-amp, we showed that the resultant circuit, which generated by GP with circuit performance and layout constraints, satisfied all the specifications with the verification of HSPICE simulation based on the BSIM model with LDE options.

Subspace representation model is an important subset of visual tracking algorithms. Compared with models performed on the original data space, subspace representation model can effectively reduce the computational complexity, and filter out high dimensional noises. However, for some complicated situations, e.g., dramatic illumination changing, large area of occlusion and abrupt object drifting, traditional subspace representation models may fail to handle the visual tracking task. In this paper, we propose a novel subspace representation algorithm for robust visual tracking by using low-rank representation with graph constraints (LRGC). Low-rank representation has been well-known for its superiority of handling corrupted samples, and graph constraint is flexible to characterize sample relationship. In this paper, we aim to exploit benefits from both low-rank representation and graph constraint, and deploy it to handle challenging visual tracking problems. Specifically, we first propose a novel graph structure to characterize the relationship of target object in different observation states. Then we learn a subspace by jointly optimizing low-rank representation and graph embedding in a unified framework. Finally, the learned subspace is embedded into a Bayesian inference framework by using the dynamical model and the observation model. Experiments on several video benchmarks demonstrate that our algorithm performs better than traditional ones, especially in dynamically changing and drifting situations.

For robust visual tracking, the main challenges of a subspace representation model can be attributed to the difficulty in handling various appearances of the target object. Traditional subspace learning tracking algorithms neglected the discriminative correlation between different multi-view target samples and the effectiveness of sparse subspace learning. For learning a better subspace representation model, we designed a discriminative graph to model both the labeled target samples with various appearances and the updated foreground and background samples, which are selected using an incremental updating scheme. The proposed discriminative graph structure not only can explicitly capture multi-modal intraclass correlations within labeled samples but also can obtain a balance between within-class local manifold and global discriminative information from foreground and background samples. Based on the discriminative graph, we achieved a sparse embedding by using L2,1-norm, which is incorporated to select relevant features and learn transformation in a unified framework. In a tracking procedure, the subspace learning is embedded into a Bayesian inference framework using compound motion estimation and a discriminative observation model, which significantly makes localization effective and accurate. Experiments on several videos have demonstrated that the proposed algorithm is robust for dealing with various appearances, especially in dynamically changing and clutter situations, and has better performance than alternatives reported in the recent literature.

With no need for Road Side Unit (RSU), multi-hop Vehicular Ad Hoc NETworks (VANETs) have drawn more and more attention recently. Considering the safety of vehicles, a Media Access Control (MAC) protocol for reliable transmission is critical for multi-hop VANETs. Most current works need RSU to handle the collisions brought by hidden-terminal problem and the mobility of vehicles. In this paper, we proposed RV-MAC, which is a reliable MAC protocol for multi-hop VANETs based on Time Division Multiple Access (TDMA). First, to address the hidden-terminal under the networks with multi-hop topology, we design a region marking scheme to divide vehicles into different regions. Then a collisions avoidance scheme is proposed to handle the collisions owing to channel competition and the mobility of vehicles. Simulation results show that compared with other protocol, RV-MAC can decrease contention collisions by 30% and encounter collisions by 50% respectively. As a result, RV-MAC achieves higher throughput and lower network delay.

An transfer learning method, called Kernel Canonical Correlation Analysis plus (KCCA+), is proposed for heterogeneous Cross-company defect prediction. Combining the kernel method and transfer learning techniques, this method improves the performance of the predictor with more adaptive ability in nonlinearly separable scenarios. Experiments validate its effectiveness.

In this paper, we exploit MapReduce framework and other optimizations to improve the performance of hash join algorithms on multi-core CPUs, including No partition hash join and partition hash join. We first implement hash join algorithms with a shared-memory MapReduce model on multi-core CPUs, including partition phase, build phase, and probe phase. Then we design an improved cuckoo hash table for our hash join, which consists of a cuckoo hash table and a chained hash table. Based on our implementation, we also propose two optimizations, one for the usage of SIMD instructions, and the other for partition phase. Through experimental result and analysis, we finally find that the partition hash join often outperforms the No partition hash join, and our hash join algorithm is faster than previous work by an average of 30%.

Linear complexity and the k-error linear complexity of periodic sequences are the important security indices of stream cipher systems. This paper focuses on the distribution of p-error linear complexity of p-ary sequences with period pn. For p-ary sequences of period pn with linear complexity pn-p+1, n≥1, we present all possible values of the p-error linear complexity, and derive the exact formulas to count the number of the sequences with any given p-error linear complexity.