Due to its simplicity and efficiency, differential evolution (DE) has gained the interest of researchers from various fields for solving global optimization problems. However, it is prone to premature convergence at local minima. To overcome this drawback, a novel hybrid dragonfly algorithm with differential evolution (Hybrid DA-DE) for solving global optimization problems is proposed. Firstly, a novel mutation operator is introduced based on the dragonfly algorithm (DA). Secondly, the scaling factor (F) is adjusted in a self-adaptive and individual-dependent way without extra parameters. The proposed algorithm combines the exploitation capability of DE and exploration capability of DA to achieve optimal global solutions. The effectiveness of this algorithm is evaluated using 30 classical benchmark functions with sixteen state-of-the-art meta-heuristic algorithms. A series of experimental results show that Hybrid DA-DE outperforms other algorithms significantly. Meanwhile, Hybrid DA-DE has the best adaptability to high-dimensional problems.

This paper presents an efficient algorithm for incremental buffer insertion and module resizing for a full-placed floorplan. Our algorithm offers a method to use the white space in a given floorplan to resize modules and insert buffers, and at the same time keeps the resultant floorplan as close to the original one as possible. Both the buffer insertion and module resizing are modeled as geometric programming problems, and can be solved extremely efficiently using new developed solution methods. The experimental results suggest that the the wire length difference between the initial floorplan and result are quite small (less than 5%), and the global structure of the initial floorplan are preserved very well.

Many existing software reliability models (SRMs) are based on the assumption that fault correction activities take a negligible amount of time and resources, which is often invalid in real-life situations. Consequently, the estimated and predicted software reliability tends to be over-optimistic, which could in turn mislead management in related decision-makings. In this paper, we first make an in-depth analysis of real-life software testing process; then a Markovian SRM considering fault correction process is proposed. Parameter estimation method and software reliability prediction method are established. A numerical example is given which shows that by using the proposed model and methods, the results obtained tend to be more appropriate and realistic.

This letter presents a new image quality metric using low order discrete orthogonal moments. The moment features are extracted in a block manner and the relative moment differences (RMD) are computed. A new exponential function based on RMD is proposed to generate the quality score. The performance of the proposed method is evaluated on public databases. Experimental results and comparisons demonstrate the efficiency of the proposed method.

Current sources are essential components for analog circuit designs, the mismatch of which causes the significant degradation of the circuit performance. This paper addresses the mismatch model of CMOS current sources, unlike the conventional modeling, focusing on the layout- and λ-dependency of the process variation, where λ is the output conductance parameter. To make it clear what variation parameter influences the mismatch, we implemented a test chip on 90 nm process technology, where we can collect the characteristics variation data for MOSFETs of various layouts. The test chip also includes D/A converters to check the differential non-linearity (DNL) caused by the mismatch of current sources when behaving as a DAC. Identifying the variation and the circuit-level errors in the measured DNLs, we reveal that our model can more accurately account for the current variation compared to the conventional mismatch model.

A new paradigm for building Virtual Controller Model (VCM) for traffic flow simulator is developed. It is based on flight plan data and is applied to Traffic Flow Management System (TFMS) in China. The problem of interest is focused on the sectors of airspace and how restrictions to aircraft movement are applied by air traffic controllers and demand overages or capacity shortfalls in sectors of airspace. To estimate and assess the balance between the traffic flow and the capacity of sector in future, we apply Virtual Controller model, which models by the sectors airspace system and its capacity constraints. Numerical results are presented and illustrated by applying them to air traffic data for a typical day in the Traffic Flow Management System. The results show that the predictive capabilities of the model are successfully validated by showing a comparison between real flow data and simulated sector flow, making this method appropriate for traffic flow management system.

As CMOS devices scaling down in nowadays integrated circuits, the impact of layout-dependent effects (LDEs) to circuit performances becomes to be significant. This paper mainly focuses on LDE-aware analog circuit synthesis. Our circuit synthesis follows an optimization framework of transistor sizing based on geometric programming (GP) in which analog circuit performances are formulated in terms of monomials and posynomials. Providing GP models for the LDEs such as the shallow trench isolation (STI) stress and the well proximity effect (WPE), we can generate layout constraints related to LDEs during the circuit synthesis. Applying our circuit synthesis to a typical two-stage op-amp, we showed that the resultant circuit, which generated by GP with circuit performance and layout constraints, satisfied all the specifications with the verification of HSPICE simulation based on the BSIM model with LDE options.

This paper addresses the on-resistance (Ron) extraction of the DMOS based driver in Power IC designs. The proposed method can extract Ron of a driver from its layout data for the arbitrarily shaped metallization patterns. Such a driver is usually composed of arbitrarily shaped metals, arrayed vias, and DMOS transistors. We use FEM to extract the parasitic resistance of the source/drain metals since its strong contribution to Ron. In order to handle the large design case and accelerate the extraction process, a domain decomposition with virtual terminal insertion method is introduced, which succeeds in extraction for a set of industrial test cases including those the FEM without domain decomposition failed in. For a layout in which the DMOS cells are regularly placed, a sub-domain reuse procedure is also proposed, which obtained a dramatic speedup for the extraction. Even without the sub-domain reuse, our method still shows advantage in runtime and memory usage according to the simulation results.

We consider the method of evaluating the detection performance of a single pulse monostatic radar for a fluctuating target in compound-Gaussian clutter plus noise background. The system uses a coded pulse compression waveform as its transmitting signal and the linear minimum mean square error (LMMSE) based reiterated filtering, also known as the adaptive pulse compression (APC). We study the theoretical statistical characteristics of the amplitude of the APC estimation for infinite iterations in this scenario. Based on this theory, we derive both the theoretical probability of false alarm and the probability of detection for the ‘ideal constant false alarm rate (CFAR)’ detector that uses amplitude of the APC estimation as the test statistics. Finaly, we verify the validity of the theoretical detection performance calculations with Monte Carlo simulations. The simulations include three different compound-Gaussian clutter models and all theoretical results well fit the simulated ones.

Drones have been attractive for many kinds of industries, but limited power supply from batteries has impeded drones from being operated for longer hours. Microwave power transmission (MPT) is one of the most prospective technologies to release them from the limitation. Since, among several types of drones, micro-drone has shorter available flight time, it is reasonable to provide micro-drone with wireless charging access with an MPT system. However, there is no suitable rectenna for micro-drone charging applications in preceding studies. In this paper, an MPT system for micro-drone was proposed at C-band where a lightweight and compact rectenna array with 20-W class output power was developed. Under illumination of a flat-top beam with 203 mW/cm2 of power density, a 16-element rectenna array was measured. The 16-element rectenna was formed with the aid of a honeycomb substrate for lightness and GaAs Schottky barrier diodes for high output. It was 37.5 g in weight and 146.4 mm by 146.4 mm in size. It output 27.0 W of dc power at 19.0 V at 5.8 GHz when radio frequency power of 280 W was generated by the injection-locked magnetron and 134 W was transmitted from the transmitting phased array. The power-to-weight ratio was 0.72W/g. The power conversion efficiency was 61.9%. These numbers outperformed the rectennas in the preceding studies and are suitable for an MPT system to micro-drone.

This letter focuses on the performance analysis on the Adaptive Sidelobe Blanker (ASB) detection algorithm in homogeneous environments, and provides closed summation expressions for Probability of Detection (PD) and Probability of False Alarm (PFA) rate in terms of hypergeometric function. The derived results are more powerful and effective than previous integral ones. Moreover, the framework can be modified to solve the the performance analysis problem involving in F or/and beta distributions. Several numerical evaluations of the convergence rate and computation time are provided and discussed.

Strong designated verifier signature scheme (SDVS) allows a verifier to privately check the validity of a signature. Recently, Huang et al. first constructed an identity-based SDVS scheme (HYWS) in a stronger security model with non-interactive proof of knowledge, which holds the security properties of unforgeability, non-transferability, non-delegatability, and privacy of signer's identity. In this paper, we show that their scheme does not provide the claimed properties. Our analysis indicates that HYWS scheme neither resist on the designated verifier signature forgery nor provide simulation indistinguishability, which violates the security properties of unforgeability, non-delegatability and non-transferability.

This paper proposes a novel design method involving the stages from analog circuit design to layout synthesis in hope of suppressing the process-induced variations with a design style called transistor array. We manage to decompose the transistors into unified sub-transistors, and arrange the sub-transistors on a uniform placement grid so that a better post-CMP profile is expected to be achieved, and that the STI-stress is evened up to alleviate the process variations. However, since lack of direct theoretical support to the transistor decomposition, we analyze and evaluate the errors arising from the decomposition in both large and small signal analysis. A test chip with decomposed transistors on it confirmed our analysis and suggested that the errors are negligibly small and the design with transistor array is applicable. Based on this conclusion, a design flow with transistor array covering from circuit design to layout synthesis is proposed, and several design cases, including three common-source amplifiers, three two-stage OPAMPS and a nano-watt current reference, are implemented on a test chip with the proposed method, to demonstrate the feasibility of our idea. The measurement results from the chip confirmed that the designs with transistor array are successful, and the proposed method is applicable.

Incident ticket classification plays an important role in the complex system maintenance. However, low classification accuracy will result in high maintenance costs. To solve this issue, this paper proposes a fuzzy output support vector machine (FOSVM) based incident ticket classification approach, which can be implemented in the context of both two-class SVMs and multi-class SVMs such as one-versus-one and one-versus-rest. Our purpose is to solve the unclassifiable regions of multi-class SVMs to output reliable and robust results by more fine-grained analysis. Experiments on both benchmark data sets and real-world ticket data demonstrate that our method has better performance than commonly used multi-class SVM and fuzzy SVM methods.

This letter mainly deals with the multi-rank signal detecting problem against Spherically Invariant Random Vector (SIRV) background with Invariance theory. It is proved that generalized likelihood ratio test (GLRT), Rao test and Wald test are all the Uniformly Most Powerful Invariant (UMPI) detectors in SIRV distributions under a mild technical condition.

In this work, we propose a new automatic speech recognition (ASR) system based on feature learning and an end-to-end training procedure for air traffic control (ATC) systems. The proposed model integrates the feature learning block, recurrent neural network (RNN), and connectionist temporal classification loss to build an end-to-end ASR model. Facing the complex environments of ATC speech, instead of the handcrafted features, a learning block is designed to extract informative features from raw waveforms for acoustic modeling. Both the SincNet and 1D convolution blocks are applied to process the raw waveforms, whose outputs are concatenated to the RNN layers for the temporal modeling. Thanks to the ability to learn representations from raw waveforms, the proposed model can be optimized in a complete end-to-end manner, i.e., from waveform to text. Finally, the multilingual issue in the ATC domain is also considered to achieve the ASR task by constructing a combined vocabulary of Chinese characters and English letters. The proposed approach is validated on a multilingual real-world corpus (ATCSpeech), and the experimental results demonstrate that the proposed approach outperforms other baselines, achieving a 6.9% character error rate.

This letter presents a Preferable Mad-y (PMad-y) turn model and Low-cost Adaptive and Fault-tolerant Routing (LAFR) method that use one and two virtual channels along the X and Y dimensions for 2D mesh Network-on-Chip (NoC). Applying PMad-y rules and using the link status of neighbor routers within 2-hops, LAFR can tolerate multiple faulty links and routers in more complicated faulty situations and impose the reliability of network without losing the performance of network. Simulation results show that LAFR achieves better saturation throughput (0.98% on average) than those of other fault-tolerant routing methods and maintains high reliability of more than 99.56% on average. For achieving 100% reliability of network, a Preferable LAFR (PLAFR) is proposed.

This paper addresses the problem of optimizing metalization patterns of back-end connections for the power-MOSFET based driver since the back-end connections tend to dominate the on-resistance Ron of the driver. We propose a heuristic algorithm to seek for better geometric shapes for the patterns targeting at minimizing Ron and at balancing the current distribution. In order to speed up the analysis, the equivalent resistance network of the driver is modified by inserting ideal switches to avoid repeatedly inverting the admittance matrix. With the behavioral model of the ideal switch, we can significantly accelerate the optimization. Simulation on three drivers from industrial TEG data demonstrates that our algorithm can reduce Ron effectively by shaping metals appropriately within a given routing area.

We developed a 5.8 GHz power-variable phase-controlled magnetron (PVPCM) which controls the phase of magnetron output by a phase shifter and controls the power by the anode current of the magnetron. This method is different from the previous 2.45 GHz phase-controlled magnetron which utilizes an injection method and a phase locked loop by the anode current, since the frequency of 5.8 GHz magnetron hardly changes with the anode current. Our experiments show that the developed 5.8 GHz PVPCM had a variable output power with 1% power stability from 160 W to 329 W, the phase accuracy was nearly ±1°, and the response time was less than 100 µs. Stable output power, high phase-controlled accuracy, and fast response speed microwave sources based on the PVPCMs are suitable for phased array system for wireless power transfer.