For low-complexity linear-phase FIR digital filters which have coefficients expressed as canonic signed digit (CSD) code, a design method to impose power-of-two DC gain is proposed. Output signal level can easily be compensated to that of input so that cascading many stages do not cause any gain errors, which are harmful in, for example, high precision measurement systems. The design is formulated as an optimization problem with magnitude response constraints. The integer linear programming modified for CSD codes is solved by the branch and bound method. The design example shows the effectiveness of the obtained filter in comparison with existing CSD filters. Also, an evaluation method for the area to implement the filter into field programmable gate array (FPGA) is proposed. The implementation example shows that the minimum critical path is obtained with only a little increase in the die area.

FIR digital filters composed of parallel multiple subfilters are proposed. A binary expression of an input signal is decomposed into multiple shorter words, which drive the subfilters having different length. The output error is evaluated by mean squared and maximum spectra. A fast algorithm is also proposed to determine optimal filter lengths and coefficients of subfilters. Many examples confirm that the proposed filters generate smaller output errors than conventional filters under the condition of specified number of multiplications and additions in filter operations. Further, multiplier and adder structures (MAS) to perform the operations of the proposed filters are also presented. The number of gates used in the proposed MAS and its critical path are estimated. The effectiveness of the proposed MAS is confirmed.

This paper presents a method to analyze and minimize output errors of 2-D non-separable FIR filters with finite wordlength. Finiteness in the wordlength causes output errors, which can be analyzed in the frequency domain when the statistics of input signals are known. The output errors can be minimized by optimizing responses corresponding to all levels of input impulses. A new ROM-based filter structure is proposed in which the optimized impulse responses are stored in the ROM. The output signals are generated by superposing the impulse responses corresponding to the input levels. Many simulation results confirm that the output signals of the proposed filters have far less errors compared to conventional filters. The hardware size of the ROM-based filters is estimated and compared with that of conventional structures. The proposed structures are more effective than the conventional ones especially when the signal wordlength is short.

It is shown that two-dimensional linear phase FIR digital filters with various shapes of frequency response can be designed and realized as modular array structures free of multiplier coefficients. The design can be performed by judicious selection of two low order linear phase transfer functions to be used at each module as kernel filters. Regular interconnection of the modules in L rows and K columns conditioned with boundary coefficients 1, 0 and 1/2 results in higher order digital filters. The kernels should be chosen appropriately to, first, generate the desired shape of frequency response characteristic and, second, lend themselves to multiplierless realization. When these two requirements are satisfied, the frequency response can be refined to possess narrower transition bands by adding additional rows and columns. General properties of the frequency response of the array are investigated resulting in Theorems that serve as valuable tools towards appropriate selection of the kernels. Several design examples are given. The array structures enjoy several favorable features. Specifically, regularity and lack of multiplier coefficients makes it suitable for high-speed systolic VLSI implementation. Computational complexity of the structure is also studied.

A classs of type 1 linear phase FIR digital filters is proposed. The filter can be realized using a parallel, modular and regular array structure. It is shown that, under some simple constraints, the consisting modules of the array can be realized free of multiplier coefficients. Such two dimensional mesh arrays are specially suitable for realization with special-purpose systolic hardware for high-speed digital signal processing tasks. Compared to the array structure, proposed by the authors, for multiplierless realization of maximally flat FIR digital filters, this class needs less adders to fulfill the same magnitude response requirements. Another attractive property of the proposed array is that a number of highpass or lowpass filters with different passband widths can be realized simultaneously in a very economical way.

This paper discusses a new design method for 2-D variable FIR digital filters, which is an extension of our previous work for 1-D case. The method uses a 3-D prototype FIR filter whose cross-sections correspond to the desired characteristics of 2-D variable FIR filters. A 2-D variable-angle FIR fan filter is given as a design example.

In this paper we propose a method for increasing the reliability in multiprocessor realization of lowpass and highpass FIR digital filters possessing a maximally flat magnitude response. This method is based on the use of array realization of the filter which has been proposed earlier by the authors. It is shown that if a processing module of the array functions erroneously, it is possible to exclude the module and still obtain a lowpass FIR filter. However, as a price we should tolerate a slight degradation in the magnitude response of the filter that is equivalent to a wider transition band. We also analyze the behavior of the filter when our proposed schemes are implemented on more than one module. The justification of our approach is based on that a slight degradation of the spectral characteristics of a filter may be well tolerated in most filtering applications and thus a graceful degradation in the frequency domain can sufficiently reduce the vulnerability to errors.

The scope of this paper is the realization of FIR digital filters with an emphasis on linear phase and maximally flat cases. The transfer functions of FIR digital filters are polynomials and polynomial evaluation algorithms can be utilized as realization schemes of these filters. In this paper we investigate the application of a class of polynomial evaluation algorithms called "recursive triangles" to the realization of FIR digital filters. The realization of an arbitrary transfer function using De Casteljau algorithm, a member of the recursive triangles used for evaluating Bernstein polynomials, is studied and it is shown that in some special and important cases it yields efficient modular structures. Realization of two dimensional filters based on Bernstein approximation is also considered. We also introduce recursive triangles for evaluating the power basis representation of polynomials and give a new multiplier-less maximally flat structure based on them. Finally, we generalize the structure further and show that Chebyshev polynomials can also be evaluated by the triangles. This is the triangular counterpart of the well-known Chebyshev structure. In general,the triangular structures yield highly modular digital filters that can be mapped to an array of concurrent processors resulting in high speed and effcient filtering specially for maximally flat transfer functions.