One of the most difficult problems that remains to be solved in wire interconnect architectures is the achievement of lower latency and higher concurrency on a shared bus or link without increasing the power and circuit overhead. Novel improvements in short distance on- and off-chip interconnects can be provided by using a multi-band RF interconnect (RF-I) system. Unlike the conventional current- or voltage-mode square wave signaling transceivers that use binary or multilevel baseband signals, the proposed RF-I transceiver uses high-frequency modulated RF passband signals with binary phase-shift keying (BPSK) modulation. The proposed low-overhead RF-I transceiver using 0.18-µm CMOS technology achieves an aggregate data rate of 4 Gb/s/pin between four I/Os (2Tx-to-2Rx) on a shared FR4 PCB line using two carriers of 6 GHz and 12 GHz. The two transceivers occupy an area of 0.077 mm2 and dissipate a power of about 25 mW with a power efficiency of 6.25 pJ/bit.