This paper introduces open-wire fault-resilient multiple-valued codes for reliable asynchronous point-to-point global communication links. In the proposed encoding, two communication modules assign complementary codewords that change between two valid states without an open-wire fault. Under an open-wire fault, at each module, the codewords don't reach to one of the two valid states and remains as “invalid” states. The detection of the invalid states makes it possible to stop sending wrong codewords caused by an open-wire fault. The detectability of the open-wire fault based on the proposed encoding is proven for m-of-n codes. The proposed code used in the multiple-valued asynchronous global communication link is capable of detecting a single open-wire fault with 3.08-times higher coding efficiency compared with a conventional multiple-valued code used in a triple-modular redundancy (TMR) link that detects an open-wire fault under the same dynamic range of logical values.

A concurrent model of computation and a language based on the model for bit-level operation are useful for developing asynchronous and concurrent programs compositionally, which frequently use bit-level operations. Some examples are programs for video games, hardware emulation (including virtual machines), and signal processing. However, few models and languages are optimized and oriented to bit-level concurrent computation. We previously developed a visual programming language called A-BITS for bit-level concurrent programming. The language is based on a dataflow-like model that computes using processes that provide serial bit-level operations and FIFO buffers connected to them. It can express bit-level computation naturally and develop compositionally. We then devised a concurrent computation model called APEC (Asynchronous Program Elements Connection) for bit-level concurrent computation. This model enables precise and formal expression of the process of computation, and a notion of primitive program elements for controlling and operating can be expressed synthetically. Specifically, the model is based on a notion of uniform primitive processes, called primitives, that have three terminals and four ordered rules at most, as well as on bidirectional communication using vehicles called carriers. A new notion is that a carrier moving between two terminals can briefly express some kinds of computation such as synchronization and bidirectional communication. The model's properties make it most applicable to bit-level computation compositionally, since the uniform computation elements are enough to develop components that have practical functionality. Through future application of the model, our research may enable further research on a base model of fine-grain parallel computer architecture, since the model is suitable for expressing massive concurrency by a network of primitives.

As a low-cost optical transceiver for access network systems, we propose a new monolithic transceiver photonic integrated circuit (PIC) fabricated by bandgap energy controlled selective metalorganic vapor phase epitaxy (MOVPE). In the PIC, all optical components are monolithically integrated. Thus, the number of optical alignment points is significantly reduced and the assembly costs of the module is decreased compared to those of hybrid modules, that use silica waveguides. Moreover, by using selective MOVPE, extremely low-loss buried heterostructure waveguides can be fabricated without any etching. In-plane bandgap energy control is also possible, allowing the formation of active and passive core layers simultaneously without complicated fabrication. The transceiver PIC showed fiber-coupled output power of more than 1 mW and receiver bandwidth of 7 GHz. Modulation and detection operations at 500 Mb/s were also demonstrated. As a cost effective fabrication technique for monolithic PICs, bandgap energy controlled selective MOVPE is a promising candidate.