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[Keyword] differential power analysis (DPA)(3hit)

1-3hit
  • Data Convertors Design for Optimization of the DDPL Family

    Song JIA  Li LIU  Xiayu LI  Fengfeng WU  Yuan WANG  Ganggang ZHANG  

     
    PAPER-Electronic Circuits

      Vol:
    E96-C No:9
      Page(s):
    1195-1200

    Information security has been seriously threatened by the differential power analysis (DPA). Delay-based dual-rail precharge logic (DDPL) is an effective solution to resist these attacks. However, conventional DDPL convertors have some shortcomings. In this paper, we propose improved convertor pairs based on dynamic logic and a sense amplifier (SA). Compared with the reference CMOS-to-DDPL convertor, our scheme could save 69% power consumption. As to the comparison of DDPL-to-CMOS convertor, the speed and power performances could be improved by 39% and 54%, respectively.

  • Acceleration of Differential Power Analysis through the Parallel Use of GPU and CPU

    Sung Jae LEE  Seog Chung SEO  Dong-Guk HAN  Seokhie HONG  Sangjin LEE  

     
    LETTER-Cryptography and Information Security

      Vol:
    E93-A No:9
      Page(s):
    1688-1692

    This paper proposes methods for accelerating DPA by using the CPU and the GPU in a parallel manner. The overhead of naive DPA evaluation software increases excessively as the number of points in a trace or the number of traces is enlarged due to the rapid increase of file I/O overhead. This paper presents some techniques, with respect to DPA-arithmetic and file handling, which can make the overhead of DPA software become not extreme but gradual as the increase of the amount of trace data to be processed. Through generic experiments, we show that the software, equipped with the proposed methods, using both CPU and GPU can shorten the time for evaluating the DPA resistance of devices by almost half.

  • Side Channel Attacks against Hash-Based MACs with PGV Compression Functions

    Katsuyuki OKEYA  

     
    PAPER-Side Channel Attacks

      Vol:
    E91-A No:1
      Page(s):
    168-175

    HMAC is one of the most famous keyed hash functions, and widely utilized. In order to design secure hash functions, we often use PGV construction consisting of 64 schemes, each of which utilizes a block cipher. If the underlying block cipher is ideal, 12 schemes are proven to be secure. In this paper, we evaluate the security of these schemes in view of side channel attacks. As it turns out, HMACs based on 11 out of 12 secure PGV schemes are vulnerable to side channel attacks, even if the underlying block cipher is secure against side channel attacks. These schemes are classified into two groups based on their vulnerabilities. For the first group which contains 8 schemes, we show that the attacker can reveal the whole key of HMAC, and selectively forge in consequence. For the other group which contains 3 schemes, we specify the importance of the execution sequence for the inner operations of the scheme, and refine it. If wrong orders of operations are used, the attacker can reveal a portion of the key of HMAC. Hence, the use of HMACs based on such PGV schemes as they are is not recommended when the resistance against side channel attacks is necessary.