Video transcoding technique is an efficient mechanism to deliver visual contents to a variety of users who have different network conditions or terminal devices with different display capabilities. In this paper, we propose two types of transcoding methods for adapting the bitrate of streaming video to the bandwidth of the transmission channel; spatial resolution reduction (SRR) transcoding and temporal resolution reduction (TRR) transcoding. The two transcoding methods are alternatively operated according to the requirements of users. Experimental results show that the proposed transcoding methods can preserve image quality while transcoding to the low bitrate.

Technology scaling will become difficult due to power wall. On the other hand, future computer and communications technology will require further reduction in power dissipation. Since no new energy efficient device technology is on the horizon, low power CMOS design should be challenged. This paper discusses what and how much designers can do for CMOS power reduction.

The gate oxide of sub-0.1 µm MOSFETs channel length is expected to be reduced beyond 3 nm in spite of an increasing direct tunneling gate current. As tunnel injection modeling into SiO2 is expected to depend on the electron transport model adopted for the device description, a critical comparison is made in this paper between gate currents obtained from simulators based on Drift-Diffusion, Energy-Balance, and Monte Carlo models. The studied device is a 0.07 µm channel length n-MOSFET with 1.5 nm thick gate oxide. It is shown that positive drain voltage is responsible for two opposite effects on DT leakage: a carrier heating and a potential barrier hardening along the channel. It is proved by a careful study of Monte Carlo microscopic quantities that, contrary to what holds for thicker gate oxide transistors, the balance is favorable to the potential barrier effect. Injection into SiO2 is then dominated by near-thermal carriers injected at the channel beginning. For this reason, the gate current decreases when increasing the drain bias, with the maximum leakage obtained for (Vgs=Vdd, Vds=0), and a correct agreement is obtained between the Drift-Diffusion, Energy-Balance, and Monte Carlo approaches of gate current calculation, in spite of very different physical descriptions of transport at the microscopic level.