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[Keyword] fractal immittance(2hit)

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  • Simulation of Fractal Immittance by Analog Circuits: An Approach to the Optimized Circuits

    Michio SUGI  Yoshiaki HIRANO  Yasuhiro F. MIURA  Kazuhiro SAITO  

     
    PAPER-Circuit Theory

      Vol:
    E82-A No:8
      Page(s):
    1627-1635

    Fractal immittance, expressed by an admittance sa (0<|a|<1), is simulated by the analog circuits composed of finite numbers of conventional elements, resistance R, capacitance C and inductance L, based on the distributed-relaxation-time models. The correlation between the number of R-C or R-L pairs and the optimum pole interval to give the widest bandwidth is estimated for each a-value by the numerical calculation for each circuit against a given criterion with respect to the phase angle. It is found that the bandwidth of 5 decades with a phase-angle error of 1 can be composed for |a|=0.1-0.9 using eighteen pairs or less of the elements.

  • Non-integer Exponents in Electronic Circuits II: Memory Effects in the Fractal Immittance

    Michio SUGI  Kazuhiro SAITO  

     
    PAPER-Analog Circuits and Signal Processing

      Vol:
    E77-A No:4
      Page(s):
    688-697

    The transient behavior in the fractal admittance acting as a non-integer-rank differential/integral operator, Y(s) ∝ sa with -1a1 and a0, is examined from the point of view of memory effects by employing the distributed-relaxation-time model. The internal state of the diode is found to be represented by the current spectrum i(λ, t) with respect to the carrier relaxation rate λ, leading to a general formulation of the long-time-tail memory behavior characteristic of the operator. One-to-one corrsepondence is found among the input voltage in the past ν(-t), the short-circuit current isc(t) and the initial current spectrum i(λ, 0) within the framework of the Laplace-type integral transformation and its inverse, assuring that each response retains in principle the entire information on the corresponding input, such as the functional form, the magnitude, the onset time, and so forth. The current and voltage responses are exemplified for various single-pulse voltage inputs. The responses to the pulse-train inputs corresponding to different ASCII codes are found to be properly discriminated between one another, showing the potentials of the present memory effects.