In this research, we investigated the threshold voltage (VTH) control by partial polarization of metal-ferroelectric-semiconductor field-effect transistors (MFSFETs) with 5 nm-thick nondoped HfO2 gate insulator utilizing Kr-plasma sputtering for Pt gate electrode deposition. The remnant polarization (2Pr) of 7.2 μC/cm2 was realized by Kr-plasma sputtering for Pt gate electrode deposition. The memory window (MW) of 0.58 V was realized by the pulse amplitude and width of -5/5 V, 100 ms. Furthermore, the VTH of MFSFET was controllable by program/erase (P/E) input pulse even with the pulse width below 100 ns which may be caused by the reduction of leakage current with decreasing plasma damage.

In this research, we investigated the metal-ferroelectric-semiconductor field-effect transistors (MFSFETs) with 5nm thick nondoped HfO2 gate insulator by decreasing the sputtering power for Pt gate electrode deposition. The leakage current was effectively reduced to 2.6×10-8A/cm2 at the voltage of -1.5V by the sputtering power of 40W for Pt electrode deposition. Furthermore, the memory window (MW) of 0.53V and retention time over 10 years were realized.

A high temperature performance of a W2N compound barrier in the model electrode configuration of W/W2N/poly-Si was examined. The stacked electrode was fairly stable upon annealing at 850 for 1 h. In this electrode configuration, the decomposition and outdiffusion of nitrogen, which were observed in the electrode with a WNx barrier incorporating nitrogen atoms at the interstitial sites in the bcc W lattice, were completely suppressed. We interpreted that the obtained excellent high temperature performance was attributed to the strong chemical interaction forming chemical bonds between nitrogen and W atoms in the W2N compound barrier.

An experimental report was presented on a high temperature performance of a ZrN barrier in the model system of W/ZrN/poly-Si as a poly-metal gate electrode configuration. The absence of interdiffusion, reaction and/or mixing of the ZrN barrier with adjoining W and poly-Si layers resulted in a successful demonstration of the thermally stable poly-metal gate electrode configuration which tolerated annealing at 850 for 1 h.