Nonnegative Matrix Factorization (NMF) with sparseness and smoothness constraints has attracted increasing attention. When these properties are considered, NMF is usually formulated as an optimization problem in which a linear combination of an approximation error term and some regularization terms must be minimized under the constraint that the factor matrices are nonnegative. In this paper, we focus our attention on the error measure based on the Euclidean distance and propose a new iterative method for solving those optimization problems. The proposed method is based on the Hierarchical Alternating Least Squares (HALS) algorithm developed by Cichocki et al. We first present an example to show that the original HALS algorithm can increase the objective value. We then propose a new algorithm called the Gauss-Seidel HALS algorithm that decreases the objective value monotonically. We also prove that it has the global convergence property in the sense of Zangwill. We finally verify the effectiveness of the proposed algorithm through numerical experiments using synthetic and real data.

In this letter an SR-latch circuit using Hopfield neural networks is introduced. An energy function suited for a neural SR-latch circuit is defined for which the global convergence is guaranteed. We also demonstrate how to compose master-slave (M/S) SR- and JK-flip flops of novel SR-latch circuits, and further an asynchronous binary counter of M/S JK-flip flops. Computer simulations are included to illustrate how each presented circuit operates.

A globally and quadratically convergent algorithm is presented for solving nonlinear resistive networks containing transistors modeled by the Gummel-Poon model or the Shichman-Hodges model. This algorithm is based on the Katzenelson algorithm that is globally convergent for a broad class of piecewise-linear resistive networks. An effective restart technique is introduced, by which the algorithm converges to the solutions of the nonlinear resistive networks quadratically. The quadratic convergence is proved and also verified by numerical examples.

An efficient algorithm is presented for solving nonlinear resistive networks. In this algorithm, the techniques of the piecewise-linear homotopy method are introduced to the Katzenelson algorithm, which is known to be globally convergent for a broad class of piecewise-linear resistive networks. The proposed algorithm has the following advantages over the original Katzenelson algorithm. First, it can be applied directly to nonlinear (not piecewise-linear) network equations. Secondly, it can find the accurate solutions of the nonlinear network equations with quadratic convergence. Therefore, accurate solutions can be computed efficiently without the piecewise-linear modeling process. The proposed algorithm is practically more advantageous than the piecewise-linear homotopy method because it is based on the Katzenelson algorithm that is very popular in circuit simulation and has been implemented on several circuit simulators.

This paper describes a novel technique to realize high performance digital sequential circuits by using Hopfield neural networks. For an example of applications of neural networks to digital circuits, a novel gate circuit, full adder circuit and latch circuit using neural networks, which have the global convergence property, are proposed. Here, global convergence means that the energy function is monotonically decreasing and each circulit always operates correctly independently of the initial values. Finally the several digital sequential circuits such as shift register and asynchronous binary counter are designed.