A parallel current-mode multilevel identifying circuit for flash memories is proposed. The sensing scheme based on the CMOS cross-coupled structure modified from the clamped bit-line sense amplifier achieves high speed and low power dissipation. The offset of the proposed sense amplifier due to mismatch is also reduced significantly. The circuit has been fabricated using 0.6 µm CMOS technology. The simulation and measurement indicate the sensing speed reaches 1 ns at 3 V supply voltage with average power consumption about 2 mW at 50 MHz.