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Masaki HANADA Hidenori NAKAZATO Hitoshi WATANABE
Multimedia applications such as music or video streaming, video teleconferencing and IP telephony are flourishing in packet-switched networks. Applications that generate such real-time data can have very diverse quality-of-service (QoS) requirements. In order to guarantee diverse QoS requirements, the combined use of a packet scheduling algorithm based on Generalized Processor Sharing (GPS) and leaky bucket traffic regulator is the most successful QoS mechanism. GPS can provide a minimum guaranteed service rate for each session and tight delay bounds for leaky bucket constrained sessions. However, the delay bounds for leaky bucket constrained sessions under GPS are unnecessarily large because each session is served according to its associated constant weight until the session buffer is empty. In order to solve this problem, a scheduling policy called Output Rate-Controlled Generalized Processor Sharing (ORC-GPS) was proposed in [17]. ORC-GPS is a rate-based scheduling like GPS, and controls the service rate in order to lower the delay bounds for leaky bucket constrained sessions. In this paper, we propose a call admission control (CAC) algorithm for ORC-GPS, for leaky-bucket constrained sessions with deterministic delay requirements. This CAC algorithm for ORC-GPS determines the optimal values of parameters of ORC-GPS from the deterministic delay requirements of the sessions. In numerical experiments, we compare the CAC algorithm for ORC-GPS with one for GPS in terms of schedulable region and computational complexity.
Komain PIBULYAROJANA Shigetomo KIMURA Yoshihiko EBIHARA
Many switching networks are currently designed to support ATM architectures. In this letter, we propose the performance improvement of a network called hybrid dilated banyan network with bypasses at the stage of 42 re-arrangeable output switch. Our letter also includes the performance analysis of the improved hybrid dilated banyan network.
Komain PIBULYAROJANA Shigetomo KIMURA Yoshihiko EBIHARA
Banyan networks are used in multiprocessor computer applications for an ATM switching. In this paper, we study the continuous blocking of the first n-stage which makes the performance of the banyan networks decrease. We use the 2-dilated banyan networks into the banyan networks to remove the continuous blocking of the first n-stage. We call the new networks as the hybrid dilated banyan networks. We explain how to analyze the throughput of this networks at each stage. Based on the analysis of input rate and output rate at each stage, we can design the hybrid dilated banyan networks with the desirable output rate. The result of analysis shows the hybrid dilated banyan networks have higher performance and feasibility than the banyan networks.