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[Keyword] partial polarization(2hit)

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  • Digital/Analog-Operation of Hf-Based FeNOS Nonvolatile Memory Utilizing Ferroelectric Nondoped HfO2 Blocking Layer Open Access

    Shun-ichiro OHMI  

     
    PAPER

      Pubricized:
    2024/06/03
      Vol:
    E107-C No:9
      Page(s):
    232-236

    In this research, we investigated the digital/analog-operation utilizing ferroelectric nondoped HfO2 (FeND-HfO2) as a blocking layer (BL) in the Hf-based metal/oxide/nitride/oxide/Si (MONOS) nonvolatile memory (NVM), so called FeNOS NVM. The Al/HfN0.5/HfN1.1/HfO2/p-Si(100) FeNOS diodes realized small equivalent oxide thickness (EOT) of 4.5 nm with the density of interface states (Dit) of 5.3 × 1010 eV-1cm-2 which were suitable for high-speed and low-voltage operation. The flat-band voltage (VFB) was well controlled as 80-100 mV with the input pulses of ±3 V/100 ms controlled by the partial polarization of FeND-HfO2 BL at each 2-bit state operated by the charge injection with the input pulses of +8 V/1-100 ms.

  • Kr-Plasma Sputtering for Pt Gate Electrode Deposition on MFSFET with 5 nm-Thick Ferroelectric Nondoped HfO2 Gate Insulator for Analog Memory Application

    Joong-Won SHIN  Masakazu TANUMA  Shun-ichiro OHMI  

     
    PAPER

      Pubricized:
    2023/06/02
      Vol:
    E106-C No:10
      Page(s):
    581-587

    In this research, we investigated the threshold voltage (VTH) control by partial polarization of metal-ferroelectric-semiconductor field-effect transistors (MFSFETs) with 5 nm-thick nondoped HfO2 gate insulator utilizing Kr-plasma sputtering for Pt gate electrode deposition. The remnant polarization (2Pr) of 7.2 μC/cm2 was realized by Kr-plasma sputtering for Pt gate electrode deposition. The memory window (MW) of 0.58 V was realized by the pulse amplitude and width of -5/5 V, 100 ms. Furthermore, the VTH of MFSFET was controllable by program/erase (P/E) input pulse even with the pulse width below 100 ns which may be caused by the reduction of leakage current with decreasing plasma damage.