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[Keyword] passive reduced-order models(1hit)

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  • Sparse Realization of Passive Reduced-Order Interconnect Models via PRIMA

    Yuya MATSUMOTO  Yuichi TANJI  Mamoru TANAKA  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E87-A No:1
      Page(s):
    251-257

    This paper describes a sparse realization of passive reduced-order interconnect models via PRIMA to provide the SPICE compatible models. It is demonstrated that, if the SPICE models are directly realized so that the reduced-order equations obtained via PRIMA are stamped into the MNA matrix, the simulations of networks containing the macromodels become computationally inefficient when size of the reduced-order equations is relatively large. This is due to dense coefficient matrices of the reduced-order equations resulting from congruent transformations in PRIMA. To overcome this disadvantage, we propose a sparse realization of the reduced-order models. Since the expression is equivalent to the reduced-order equations, the passivity of the SPICE models generated is also guaranteed. Computational efficiency on SPICE is demonstrated in performing the transient analysis of circuits containing the proposed macromodels.