Cognitive radio (CR) is an adaptive spectrum sharing paradigm targeted to provide opportunistic spectrum access to secondary users for whom the frequency bands have not been licensed. The key tasks in a CR are to sense the spectral environment over a wide frequency band and allow unlicensed secondary users (CR users) to dynamically transmit/receive data over frequency bands unutilized by licensed primary users. Thus the CR transceiver should dynamically adapt its channel (frequency band) in response to the time-varying frequencies of wideband signal for seamless communication. In this paper, we present a low complexity reconfigurable filter architecture based on multi-band filtering and frequency masking techniques for dynamic channel adaptation in CR terminal. The proposed multi-standard architecture is capable of adapting to channels having different bandwidths corresponding to the channel spacing of time-varying channels. Design examples show that proposed architecture offers 12.2% power reduction and 26.5% average gate count reduction over conventional Per-Channel based architecture.

Recent advancements in the ubiquitous sensor network field have brought considerable feasibility to the realization of a ubiquitous society. A ubiquitous sensor network will enable the cooperative gathering of environmental information or the detection of special events through a large number of spatially distributed sensor nodes. Thus far, radio frequency identification (RFID) as an application for realizing the ubiquitous environment has mainly been developed for public and industrial systems. To this end, the most existing applications have demanded low-end antennas. In recent years, interests of ubiquitous sensor network have been broadened to medical body area networks (BAN), wireless personal area networks (WPAN), along with ubiquitous smart worlds. This increasing attention toward in ubiquitous sensor network has great implications for antennas. The design of functional antennas has received much attention because they can provide various kinds of properties and operation modes. These high-end antennas have some functions besides radiation. Furthermore, smart sensor nodes equipped with cooperated high-end antennas would allow them to respond adaptively to environmental events. Therefore, some design approaches of functional antennas with sensing and reconfigurability as high-end solution for smart sensor node, as well as low-end antennas for mobile RFID (mRFID) and SAW transponder are presented in this paper.

Test compression / decompression scheme for reducing the test application time and memory requirement of an LSI tester has been proposed. In the scheme, the employed coding algorithms are tailored to a given test data, so that the tailored coding algorithm can highly compress the test data. However, these methods have some drawbacks, e.g., the coding algorithm is ineffective in extra test data except for the given test data. In this paper, we introduce an embedded decompressor that is reconfigurable according to coding algorithms and given test data. Its reconfigurability can overcome the drawbacks of conventional decompressors with keeping high compression ratio. Moreover, we propose an architecture of reconfigurable decompressors for four variable-length codings. In the proposed architecture, the common functions for four codings are implemented as fixed (or non-reconfigurable) components so as to reduce the configuration data, which is stored on an ATE and sent to a CUT. Experimental results show that (1) the configuration data size becomes reasonably small by reducing the configuration part of the decompressor, (2) the reconfigurable decompressor is effective for SoC testing in respect of the test data size, and (3) it can achieve an optimal compression of test data by Huffman coding.

The objectives of the End-to-End Reconfigurability (E2R) research project are to bring the full benefits of the valuable diversity within the radio eco-space, composed of a wide range of systems (such as cellular, wireless local area and broadcast), and to devise, develop and trial architectural design of reconfigurable devices and supporting system functions to offer an expanded set of operational choices to the different actors of the value chain in the context of heterogeneous mobile radio systems. The E2R project will help operators to better exploit their investments on infrastructures and terminals and ensure that the infrastructure will be flexible and reconfigurable to accommodate evolving standards, applications and the end-user needs. E2R is seen by many actors of the wireless industry as a core technology to enable the full potential of beyond 3G systems. It has the potential to revolutionize wireless just as the PC revolutionized computing. This paper presents the E2R research project, its architectural framework and approach, the main fields of investigations across the different technical workpackages in 2005, as well as the E2R Phase 2 project proposal ambitions (2006-2007).

This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array which enables dynamic and autonomous reconfiguration of the logic circuits. The LSI was completed by successfully introducing two specific features: fully asynchronous logic circuits and a homogeneous structure, only LUTs are used.

Software radio promises to bring unparalleled flexibility and reconfigurability to wireless systems, with enormous commercial potential. As the next decade progresses SDR is expected by many to emerge as the dominant design in the commercial wireless marketplace. However, significant practical issues associated with security and regulation exist which, if not adequately addressed, could threaten to result in regulatory hurdles precluding, or at least delaying, its deployment--a regulator could be understandably hesitant about authorising the operation of a handset whose radio emissions can be determined by an end user downloading and using unproven software from an arbitrary source post-purchase. In this article we describe the Reconfiguration Management Architecture--a pragmatic technological approach, developed within the framework of Mobile VCE research, that offers solutions to this and other associated SDR problems. The RMA approach fully acknowledges and builds upon the necessary interaction between the user terminal and the network to allow full validation of a reconfigured user device prior to realtime operational authorisation. Such an architecture allows responsibility for validation to be delegated and assigned by a national regulator to, for example, a mobile network operator. Such a capability can, in turn, facilitate the creation and growth of an open market in downloadable software provision, which itself promises to encourage rapid development of new capabilities, applications and innovation. New business models and revenue streams may be expected to result. This article describes the basic technical concepts associated with the RMA, explaining the key functionalities residing within the terminal and the network and their interrelationships. The RMA is presently being evaluated as part of the SDR Forum's security and architecture work. It promises to provide realistic solutions that could accelerate the successful commercial deployment and rollout of SDR technology to the benefit of the industry, across the whole value chain.

The finite reconfigurability and local reconfigurability of graphs were proposed by Sha and Steiglitz [1], [2] in connection with a problem of on-line reconfiguraion of WSI networks for run-time faults. It is shown in [2] that a t-locally-reconfigurable graph for a 2-dimensional N-vertex array AN can be constructed from AN by adding O(N) vertices and edges. We show that Ω(N) vertices must be added to an N-vertex graph GN in order to construct a t-locally-reconfigurable graph for GN, which means that the number of added vertices for the above mentioned t-locally-reconfigurable graph for AN is optimal to within a constant factor. We also show that a t-finitely-reconfigurable graph for an N-vertex graph GN can be constructed from GN by adding t vertices and tN + t (t+1)/2 edges.

In general, message passing multiprocessors suffer from communication overhead and shared memory multiprocessors suffer from memory contention. Also, data I/O overhead limits performance. In particular, computer vision tasks that require massive computation are strongly affected by these disadvantages. This paper proposes new parallel architectures for computer vision, a Flexibly (Tightly/Loosely) Coupled Multiprocessor (FCM) and a Flexibly Coupled Hypercube Multiprocessor (FCHM) to alleviate these problems. FCM and FCHM have a variable address space memory in which a set of neighboring memory modules can be merged into a shared memory by a dynamically partitionable topology. FCM and FCHM are based on two different topologies: reconfigurable bus and hypercube. The proposed architectures are quantitatively analyzed using computational models and parallel vision algorithms are simulated on FCM and FCHM using the Intel's Personal SuperComputer (iPSC), a hypercube multiprocessor, showing significant performance improvements over that of iPSC.