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Minkyoung PARK Kiseon KIM Jeong-A LEE
This paper describes a CORDIC-based direct digital frequency synthesizer in comparison with a ROM-based architecture. To optimize the hardware design parameters, we perform numerical analysis of the quantization effects for ROM and CORDIC-based architectures. The hardware costs of them are estimated in FPGA, which shows that the CORDIC-based architecture becomes better than the ROM-based when the required accuracy is 9 bits or more.