Network Slicing (NS) is recognized as a key technology for the 5G network in providing tailored network services towards various types of verticals over a shared physical infrastructure. It offers the flexibility of on-demand provisioning of diverse services based on tenants' requirements in a dynamic environment. In this work, we focus on two important issues related to 5G Core slices: the deployment and the reconfiguration of 5G Core NSs. Firstly, for slice deployment, balancing the workloads of the underlying network is beneficial in mitigating resource fragmentation for accommodating the future unknown network slice requests. In this vein, we formulate a load-balancing oriented 5G Core NS deployment problem through an Integer Linear Program (ILP) formulation. Further, for slice reconfiguration, we propose a reactive strategy to accommodate a rejected NS request by reorganizing the already-deployed NSs. Typically, the NS deployment algorithm is reutilized with slacked physical resources to find out the congested part of the network, due to which the NS is rejected. Then, these congested physical nodes and links are reconfigured by migrating virtual network functions and virtual links, to re-balance the utilization of the whole physical network. To evaluate the performance of deployment and reconfiguration algorithms we proposed, extensive simulations have been conducted. The results show that our deployment algorithm performs better in resource balancing, hence achieves higher acceptance ratio by comparing to existing works. Moreover, our reconfiguration algorithm improves resource utilization by accommodating more NSs in a dynamic environment.

Connection of internal scan chains in core wrapper design (CWD) is necessary to handle the width match of TAM and internal scan chains. However, conventional serial connection of internal scan chains incurs power and time penalty. Study shows that the distribution and high density of don't care bits (X-bits) in test patterns make scan slices overlapping and partial overlapping possible. A novel parallel CWD (pCWD) approach is presented in this paper for lowering test power by shortening wrapper scan chains and adjusting test patterns. In order to achieve shift time reduction from overlapping in pCWD, a two-phase process on test pattern: partition and fill, is presented. Experimental results on d695 of ITC2002 benchmark demonstrated the shift time and test power have been decreased by 1.5 and 15 times, respectively. In addition, the proposed pCWD can be used as a stand-alone time reduction technique, which has better performance than previous techniques.

Existing algorithmic debugging methods which can locate faults under the guidance of a system have a number of shortcomings. For example, some cannot be applied to imperative languages with side effects; some can locate a faulty function but cannot locate a faulty statement; and some cannot detect faults related to missing statements. This paper presents an algorithmic critical slice-based fault-locating method for imperative languages. Program faults are first classified into two categories: wrong-value faults and missing-assignment faults. The critical slice with respect to a variable-value error is a set of statements such that (1) a wrong-value fault contained in any instruction in the critical slice may have caused that variable-value error, and (2) a wrong-value fault contained in any instruction outside the critical slice could never have caused that variable-value error. The paper also classifies errors found during program testing into three categories: wrong-output errors, missing-output errors, and infinite-loop errors with no output. It finally shows that it is possible to algorithmically locate any fault, including missing statements, for each type of error.