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Analog and digital collaborative design techniques for wireless SoCs are reviewed in this paper. In wireless SoCs, delicate analog performance such as sensitivity of the receiver is easily degraded due to interferences from digital circuit blocks. On the other hand, an analog performance such as distortion is strongly compensated by digital assist techniques with low power consumption. In this paper, a sensitivity recovery technique using the analog and digital collaborative design, and digital assist techniques to achieve low-power and high-performance analog circuits are presented. Such analog and digital collaborative design is indispensable for wireless SoCs.
Yoshimitsu TAKAMATSU Ryuichi FUJIMOTO Tsuyoshi SEKINE Takaya YASUDA Mitsumasa NAKAMURA Takuya HIRAKAWA Masato ISHII Motohiko HAYASHI Hiroya ITO Yoko WADA Teruo IMAYAMA Tatsuro OOMOTO Yosuke OGASAWARA Masaki NISHIKAWA Yoshihiro YOSHIDA Kenji YOSHIOKA Shigehito SAIGUSA Hiroshi YOSHIDA Nobuyuki ITOH
This paper presents a single-chip RF tuner/OFDM demodulator for a mobile digital TV application called “1-segment broadcasting.” To achieve required performances for the single-chip receiver, a tunable technique for a low-noise amplifier (LNA) and spurious suppression techniques are proposed in this paper. Firstly, to receive all channels from 470 MHz to 770 MHz and to relax distortion characteristics of following circuit blocks such as an RF variable-gain amplifier and a mixer, a tunable technique for the LNA is proposed. Then, to improve the sensitivity, spurious signal suppression techniques are also proposed. The single-chip receiver using the proposed techniques is fabricated in 90 nm CMOS technology and total die size is 3.26 mm 3.26 mm. Using the tunable LNA and suppressing undesired spurious signals, the sensitivities of less than -98.6 dBm are achieved for all the channels.
Hideyuki NOSAKA Tadao NAKAGAWA Akihiro YAMAGISHI
We have developed a new type of phase interpolation DDS with a digitally controlled delay generator. The new DDS is similar to a sine output DDS in that it produces low spurious signals, but it does not require a sine look-up table. Periodic jitter in the MSB of the DDS accumulator is reduced with the digitally controlled delay generator. Experimental results confirm successful frequency synthesizer operation in which the spurious signal level is successfully reduced to less than that the MSB of the accumulator.
Nozomu NISHINAGA Yoshihiro IWADARE
M-ary orthogonal keying (MOK) systems under carrier frequency offset (CFO) are investigated. It is shown that spurious signals are introduced by the offset frequency components of spectrum after multiplication in correlation detection process, and some conditions on robust orthogonal signal sets are derived. Walsh function sets are found to be very weak against CFO, since they produce large spurious signals. As robust orthogonal signal sets against CFO, the rows of circulant Hadamard matrices are proposed and their error performanses are evaluated. The results show that they are good M-ary orthogonal signal sets in the presence of CFO.