Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs
Summary :
Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E88-B No.8 pp.3176-3181
- Publication Date
- 2005/08/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietcom/e88-b.8.3176
- Type of Manuscript
- Special Section PAPER (Special Section of 2004 International Symposium on Electromagnetic Compatibility)
- Category
- Printed Circuit Boards
Authors
Keyword
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Zhi Liang WANG, Osami WADA, Takashi HARADA, Takahiro YAGUCHI, Yoshitaka TOYOTA, Ryuji KOGA, "Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs" in IEICE TRANSACTIONS on Communications,
vol. E88-B, no. 8, pp. 3176-3181, August 2005, doi: 10.1093/ietcom/e88-b.8.3176.
Abstract: Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.
URL: https://global.ieice.org/en_transactions/communications/10.1093/ietcom/e88-b.8.3176/_p
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@ARTICLE{e88-b_8_3176,
author={Zhi Liang WANG, Osami WADA, Takashi HARADA, Takahiro YAGUCHI, Yoshitaka TOYOTA, Ryuji KOGA, },
journal={IEICE TRANSACTIONS on Communications},
title={Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs},
year={2005},
volume={E88-B},
number={8},
pages={3176-3181},
abstract={Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.},
keywords={},
doi={10.1093/ietcom/e88-b.8.3176},
ISSN={},
month={August},}
Copy
TY - JOUR
TI - Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs
T2 - IEICE TRANSACTIONS on Communications
SP - 3176
EP - 3181
AU - Zhi Liang WANG
AU - Osami WADA
AU - Takashi HARADA
AU - Takahiro YAGUCHI
AU - Yoshitaka TOYOTA
AU - Ryuji KOGA
PY - 2005
DO - 10.1093/ietcom/e88-b.8.3176
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E88-B
IS - 8
JA - IEICE TRANSACTIONS on Communications
Y1 - August 2005
AB - Power bus noise problem has become a major concern for both EMC engineers and board designers. A fast algorithm, based on the cavity-mode model, was employed for analyzing resonance characteristics of multilayer power bus stacks interconnected by vias. The via is modeled as an inductance and its value is given by a simple expression. Good agreement between the simulated results and measurements demonstrates the effectiveness of the cavity-mode model, together with the via model.
ER -
English
