IEICE TRANSACTIONS on Communications
Iterative Channel Estimation for Frequency-Domain Equalization of DSSS Signals
Summary :
As the channel frequency selectivity becomes severer, the bit error rate (BER) performance of direct sequence spread spectrum (DSSS) signal transmission with rake combining degrades due to an increasing inter-path interference (IPI). Frequency-domain equalization (FDE) can replace rake combining with much improved BER performance in a severe frequency-selective fading channel. For FDE, accurate estimation of the channel transfer function is required. In this paper, we propose an iterative channel estimation that uses pilot chips which are time-multiplexed within each chip block for fast Fourier transform (FFT). The pilot acts as a cyclic-prefix of FFT block as well. The achievable BER performance is evaluated by computer simulation. It is shown that the proposed channel estimation has a very good tracking ability against fast fading.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E90-B No.5 pp.1171-1180
- Publication Date
- 2007/05/01
- Publicized
- Online ISSN
- 1745-1345
- DOI
- 10.1093/ietcom/e90-b.5.1171
- Type of Manuscript
- PAPER
- Category
- Wireless Communication Technologies
Authors
Keyword
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Koichi ISHIHARA, Kazuaki TAKEDA, Fumiyuki ADACHI, "Iterative Channel Estimation for Frequency-Domain Equalization of DSSS Signals" in IEICE TRANSACTIONS on Communications,
vol. E90-B, no. 5, pp. 1171-1180, May 2007, doi: 10.1093/ietcom/e90-b.5.1171.
Abstract: As the channel frequency selectivity becomes severer, the bit error rate (BER) performance of direct sequence spread spectrum (DSSS) signal transmission with rake combining degrades due to an increasing inter-path interference (IPI). Frequency-domain equalization (FDE) can replace rake combining with much improved BER performance in a severe frequency-selective fading channel. For FDE, accurate estimation of the channel transfer function is required. In this paper, we propose an iterative channel estimation that uses pilot chips which are time-multiplexed within each chip block for fast Fourier transform (FFT). The pilot acts as a cyclic-prefix of FFT block as well. The achievable BER performance is evaluated by computer simulation. It is shown that the proposed channel estimation has a very good tracking ability against fast fading.
URL: https://global.ieice.org/en_transactions/communications/10.1093/ietcom/e90-b.5.1171/_p
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@ARTICLE{e90-b_5_1171,
author={Koichi ISHIHARA, Kazuaki TAKEDA, Fumiyuki ADACHI, },
journal={IEICE TRANSACTIONS on Communications},
title={Iterative Channel Estimation for Frequency-Domain Equalization of DSSS Signals},
year={2007},
volume={E90-B},
number={5},
pages={1171-1180},
abstract={As the channel frequency selectivity becomes severer, the bit error rate (BER) performance of direct sequence spread spectrum (DSSS) signal transmission with rake combining degrades due to an increasing inter-path interference (IPI). Frequency-domain equalization (FDE) can replace rake combining with much improved BER performance in a severe frequency-selective fading channel. For FDE, accurate estimation of the channel transfer function is required. In this paper, we propose an iterative channel estimation that uses pilot chips which are time-multiplexed within each chip block for fast Fourier transform (FFT). The pilot acts as a cyclic-prefix of FFT block as well. The achievable BER performance is evaluated by computer simulation. It is shown that the proposed channel estimation has a very good tracking ability against fast fading.},
keywords={},
doi={10.1093/ietcom/e90-b.5.1171},
ISSN={1745-1345},
month={May},}
Copy
TY - JOUR
TI - Iterative Channel Estimation for Frequency-Domain Equalization of DSSS Signals
T2 - IEICE TRANSACTIONS on Communications
SP - 1171
EP - 1180
AU - Koichi ISHIHARA
AU - Kazuaki TAKEDA
AU - Fumiyuki ADACHI
PY - 2007
DO - 10.1093/ietcom/e90-b.5.1171
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E90-B
IS - 5
JA - IEICE TRANSACTIONS on Communications
Y1 - May 2007
AB - As the channel frequency selectivity becomes severer, the bit error rate (BER) performance of direct sequence spread spectrum (DSSS) signal transmission with rake combining degrades due to an increasing inter-path interference (IPI). Frequency-domain equalization (FDE) can replace rake combining with much improved BER performance in a severe frequency-selective fading channel. For FDE, accurate estimation of the channel transfer function is required. In this paper, we propose an iterative channel estimation that uses pilot chips which are time-multiplexed within each chip block for fast Fourier transform (FFT). The pilot acts as a cyclic-prefix of FFT block as well. The achievable BER performance is evaluated by computer simulation. It is shown that the proposed channel estimation has a very good tracking ability against fast fading.
ER -
English
