In full duplex (FD), which improves the system capacity (or cell throughput) and reduces the transmission delay (or latency) through simultaneous transmission and reception in the same frequency band, self-interference (SI) from the transmitter should be suppressed using antenna isolation, an analog SI canceler, and digital SI canceler (DSIC) to a level such that the data or control channel satisfies the required block error rate (BLER). This paper proposes a structure of iterative DSIC with alternating estimate subtraction (AES-IDSIC) for orthogonal frequency division multiplexing (OFDM) using FD. We first present the required SI suppression level considering SI, quantization noise of an analog-to-digital converter, and nonlinear distortion of a power amplifier and RF receiver circuit for a direct conversion transceiver using FD. Then, we propose an AES-IDSIC structure that iterates the generation of the SI estimate, the downlink symbol estimate, and then alternately removes one of the estimates from the received signal in the downlink including SI. We investigate the average BLER performance of the AES-IDSIC for OFDM using FD in a multipath fading channel based on link-level simulations under the constraint that the derived required signal-to-SI ratio must be satisfied.
Takahiro OHTOMO
Tokyo City University
Hiroki YAMADA
Tokyo City University
Mamoru SAWAHASHI
Tokyo City University
Keisuke SAITO
NTT DOCOMO INC.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Takahiro OHTOMO, Hiroki YAMADA, Mamoru SAWAHASHI, Keisuke SAITO, "Performance of Iterative Digital Self-Interference Canceler with Alternating Estimate Subtraction for OFDM Using Full Duplex" in IEICE TRANSACTIONS on Communications,
vol. E102-B, no. 8, pp. 1490-1502, August 2019, doi: 10.1587/transcom.2018TTP0018.
Abstract: In full duplex (FD), which improves the system capacity (or cell throughput) and reduces the transmission delay (or latency) through simultaneous transmission and reception in the same frequency band, self-interference (SI) from the transmitter should be suppressed using antenna isolation, an analog SI canceler, and digital SI canceler (DSIC) to a level such that the data or control channel satisfies the required block error rate (BLER). This paper proposes a structure of iterative DSIC with alternating estimate subtraction (AES-IDSIC) for orthogonal frequency division multiplexing (OFDM) using FD. We first present the required SI suppression level considering SI, quantization noise of an analog-to-digital converter, and nonlinear distortion of a power amplifier and RF receiver circuit for a direct conversion transceiver using FD. Then, we propose an AES-IDSIC structure that iterates the generation of the SI estimate, the downlink symbol estimate, and then alternately removes one of the estimates from the received signal in the downlink including SI. We investigate the average BLER performance of the AES-IDSIC for OFDM using FD in a multipath fading channel based on link-level simulations under the constraint that the derived required signal-to-SI ratio must be satisfied.
URL: https://global.ieice.org/en_transactions/communications/10.1587/transcom.2018TTP0018/_p
Copy
@ARTICLE{e102-b_8_1490,
author={Takahiro OHTOMO, Hiroki YAMADA, Mamoru SAWAHASHI, Keisuke SAITO, },
journal={IEICE TRANSACTIONS on Communications},
title={Performance of Iterative Digital Self-Interference Canceler with Alternating Estimate Subtraction for OFDM Using Full Duplex},
year={2019},
volume={E102-B},
number={8},
pages={1490-1502},
abstract={In full duplex (FD), which improves the system capacity (or cell throughput) and reduces the transmission delay (or latency) through simultaneous transmission and reception in the same frequency band, self-interference (SI) from the transmitter should be suppressed using antenna isolation, an analog SI canceler, and digital SI canceler (DSIC) to a level such that the data or control channel satisfies the required block error rate (BLER). This paper proposes a structure of iterative DSIC with alternating estimate subtraction (AES-IDSIC) for orthogonal frequency division multiplexing (OFDM) using FD. We first present the required SI suppression level considering SI, quantization noise of an analog-to-digital converter, and nonlinear distortion of a power amplifier and RF receiver circuit for a direct conversion transceiver using FD. Then, we propose an AES-IDSIC structure that iterates the generation of the SI estimate, the downlink symbol estimate, and then alternately removes one of the estimates from the received signal in the downlink including SI. We investigate the average BLER performance of the AES-IDSIC for OFDM using FD in a multipath fading channel based on link-level simulations under the constraint that the derived required signal-to-SI ratio must be satisfied.},
keywords={},
doi={10.1587/transcom.2018TTP0018},
ISSN={1745-1345},
month={August},}
Copy
TY - JOUR
TI - Performance of Iterative Digital Self-Interference Canceler with Alternating Estimate Subtraction for OFDM Using Full Duplex
T2 - IEICE TRANSACTIONS on Communications
SP - 1490
EP - 1502
AU - Takahiro OHTOMO
AU - Hiroki YAMADA
AU - Mamoru SAWAHASHI
AU - Keisuke SAITO
PY - 2019
DO - 10.1587/transcom.2018TTP0018
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E102-B
IS - 8
JA - IEICE TRANSACTIONS on Communications
Y1 - August 2019
AB - In full duplex (FD), which improves the system capacity (or cell throughput) and reduces the transmission delay (or latency) through simultaneous transmission and reception in the same frequency band, self-interference (SI) from the transmitter should be suppressed using antenna isolation, an analog SI canceler, and digital SI canceler (DSIC) to a level such that the data or control channel satisfies the required block error rate (BLER). This paper proposes a structure of iterative DSIC with alternating estimate subtraction (AES-IDSIC) for orthogonal frequency division multiplexing (OFDM) using FD. We first present the required SI suppression level considering SI, quantization noise of an analog-to-digital converter, and nonlinear distortion of a power amplifier and RF receiver circuit for a direct conversion transceiver using FD. Then, we propose an AES-IDSIC structure that iterates the generation of the SI estimate, the downlink symbol estimate, and then alternately removes one of the estimates from the received signal in the downlink including SI. We investigate the average BLER performance of the AES-IDSIC for OFDM using FD in a multipath fading channel based on link-level simulations under the constraint that the derived required signal-to-SI ratio must be satisfied.
ER -