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This paper presents the design, implementation, and evaluation of a time-aware shaper, which is a traffic shaper specifically designed for IEEE 802.1Qbv-compliant time-sensitive networks. The proposed design adopts a software-based approach rather than using a dedicated custom logic chip such as an ASIC or FPGA. In particular, the proposed approach includes a run-time scheduler and a network interface card (NIC) that supports a time-based transmission scheme (i.e., launch-time feature). The run-time scheduler prefetches information (i.e., gate control entry) ahead of time from a given gate control list. With the prefetched information, the scheduler determines a launch time for each frame, and the NIC controls the time at which the transmission of each frame is started in a highly punctual manner. Evaluation results show that the proposed shaper triggers transmission of multiple time-sensitive streams at their intended timings in accordance with a given gate control list, even in the presence of high-bandwidth background traffic. Furthermore, we compare the timing accuracy of frame transmission with and without use of the launch-time feature of the NIC. Results indicate that the proposed shaper significantly reduces jitter of time-sensitive streams (to less than 0.1 µs) unlike a baseline implementation that does not use the launch-time feature.
Yasin OGE
Toshiba Corporation
Yuta KOBAYASHI
Toshiba Corporation
Takahiro YAMAURA
Toshiba Corporation
Tomonori MAEGAWA
Toshiba Corporation
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Yasin OGE, Yuta KOBAYASHI, Takahiro YAMAURA, Tomonori MAEGAWA, "Software-Based Time-Aware Shaper for Time-Sensitive Networks" in IEICE TRANSACTIONS on Communications,
vol. E103-B, no. 3, pp. 167-180, March 2020, doi: 10.1587/transcom.2019EBT0001.
Abstract: This paper presents the design, implementation, and evaluation of a time-aware shaper, which is a traffic shaper specifically designed for IEEE 802.1Qbv-compliant time-sensitive networks. The proposed design adopts a software-based approach rather than using a dedicated custom logic chip such as an ASIC or FPGA. In particular, the proposed approach includes a run-time scheduler and a network interface card (NIC) that supports a time-based transmission scheme (i.e., launch-time feature). The run-time scheduler prefetches information (i.e., gate control entry) ahead of time from a given gate control list. With the prefetched information, the scheduler determines a launch time for each frame, and the NIC controls the time at which the transmission of each frame is started in a highly punctual manner. Evaluation results show that the proposed shaper triggers transmission of multiple time-sensitive streams at their intended timings in accordance with a given gate control list, even in the presence of high-bandwidth background traffic. Furthermore, we compare the timing accuracy of frame transmission with and without use of the launch-time feature of the NIC. Results indicate that the proposed shaper significantly reduces jitter of time-sensitive streams (to less than 0.1 µs) unlike a baseline implementation that does not use the launch-time feature.
URL: https://global.ieice.org/en_transactions/communications/10.1587/transcom.2019EBT0001/_p
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@ARTICLE{e103-b_3_167,
author={Yasin OGE, Yuta KOBAYASHI, Takahiro YAMAURA, Tomonori MAEGAWA, },
journal={IEICE TRANSACTIONS on Communications},
title={Software-Based Time-Aware Shaper for Time-Sensitive Networks},
year={2020},
volume={E103-B},
number={3},
pages={167-180},
abstract={This paper presents the design, implementation, and evaluation of a time-aware shaper, which is a traffic shaper specifically designed for IEEE 802.1Qbv-compliant time-sensitive networks. The proposed design adopts a software-based approach rather than using a dedicated custom logic chip such as an ASIC or FPGA. In particular, the proposed approach includes a run-time scheduler and a network interface card (NIC) that supports a time-based transmission scheme (i.e., launch-time feature). The run-time scheduler prefetches information (i.e., gate control entry) ahead of time from a given gate control list. With the prefetched information, the scheduler determines a launch time for each frame, and the NIC controls the time at which the transmission of each frame is started in a highly punctual manner. Evaluation results show that the proposed shaper triggers transmission of multiple time-sensitive streams at their intended timings in accordance with a given gate control list, even in the presence of high-bandwidth background traffic. Furthermore, we compare the timing accuracy of frame transmission with and without use of the launch-time feature of the NIC. Results indicate that the proposed shaper significantly reduces jitter of time-sensitive streams (to less than 0.1 µs) unlike a baseline implementation that does not use the launch-time feature.},
keywords={},
doi={10.1587/transcom.2019EBT0001},
ISSN={1745-1345},
month={March},}
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TY - JOUR
TI - Software-Based Time-Aware Shaper for Time-Sensitive Networks
T2 - IEICE TRANSACTIONS on Communications
SP - 167
EP - 180
AU - Yasin OGE
AU - Yuta KOBAYASHI
AU - Takahiro YAMAURA
AU - Tomonori MAEGAWA
PY - 2020
DO - 10.1587/transcom.2019EBT0001
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E103-B
IS - 3
JA - IEICE TRANSACTIONS on Communications
Y1 - March 2020
AB - This paper presents the design, implementation, and evaluation of a time-aware shaper, which is a traffic shaper specifically designed for IEEE 802.1Qbv-compliant time-sensitive networks. The proposed design adopts a software-based approach rather than using a dedicated custom logic chip such as an ASIC or FPGA. In particular, the proposed approach includes a run-time scheduler and a network interface card (NIC) that supports a time-based transmission scheme (i.e., launch-time feature). The run-time scheduler prefetches information (i.e., gate control entry) ahead of time from a given gate control list. With the prefetched information, the scheduler determines a launch time for each frame, and the NIC controls the time at which the transmission of each frame is started in a highly punctual manner. Evaluation results show that the proposed shaper triggers transmission of multiple time-sensitive streams at their intended timings in accordance with a given gate control list, even in the presence of high-bandwidth background traffic. Furthermore, we compare the timing accuracy of frame transmission with and without use of the launch-time feature of the NIC. Results indicate that the proposed shaper significantly reduces jitter of time-sensitive streams (to less than 0.1 µs) unlike a baseline implementation that does not use the launch-time feature.
ER -