A 2.4/5.2 GHz CMOS dual band driver stages with integrated 5.2 GHz power amplifier is presented in this work. For more accurate simulation of high power CMOS amplifier, a re-optimized macro NMOS model is used, whose nonlinear model accuracy is enhanced and its validity is proved by comparing load pull simulation with measurement. In order to achieve band selection, it has switched matching circuits at the first stage and SPDT path switch following them. At 2.4 GHz and 5.2 GHz bands, the achieved values of Psat of the switched amplifier are 9.7 dBm and 19.5 dBm, respectively. The achieved PAE is 15.3% at 5.2 GHz.
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YunSeong EO, KwangDu LEE, "2.4/5.2 GHz Dual Band CMOS Driver Stage with Integrated 5.2 GHz Power Amplifier" in IEICE TRANSACTIONS on Electronics,
vol. E88-C, no. 8, pp. 1772-1778, August 2005, doi: 10.1093/ietele/e88-c.8.1772.
Abstract: A 2.4/5.2 GHz CMOS dual band driver stages with integrated 5.2 GHz power amplifier is presented in this work. For more accurate simulation of high power CMOS amplifier, a re-optimized macro NMOS model is used, whose nonlinear model accuracy is enhanced and its validity is proved by comparing load pull simulation with measurement. In order to achieve band selection, it has switched matching circuits at the first stage and SPDT path switch following them. At 2.4 GHz and 5.2 GHz bands, the achieved values of Psat of the switched amplifier are 9.7 dBm and 19.5 dBm, respectively. The achieved PAE is 15.3% at 5.2 GHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.8.1772/_p
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@ARTICLE{e88-c_8_1772,
author={YunSeong EO, KwangDu LEE, },
journal={IEICE TRANSACTIONS on Electronics},
title={2.4/5.2 GHz Dual Band CMOS Driver Stage with Integrated 5.2 GHz Power Amplifier},
year={2005},
volume={E88-C},
number={8},
pages={1772-1778},
abstract={A 2.4/5.2 GHz CMOS dual band driver stages with integrated 5.2 GHz power amplifier is presented in this work. For more accurate simulation of high power CMOS amplifier, a re-optimized macro NMOS model is used, whose nonlinear model accuracy is enhanced and its validity is proved by comparing load pull simulation with measurement. In order to achieve band selection, it has switched matching circuits at the first stage and SPDT path switch following them. At 2.4 GHz and 5.2 GHz bands, the achieved values of Psat of the switched amplifier are 9.7 dBm and 19.5 dBm, respectively. The achieved PAE is 15.3% at 5.2 GHz.},
keywords={},
doi={10.1093/ietele/e88-c.8.1772},
ISSN={},
month={August},}
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TY - JOUR
TI - 2.4/5.2 GHz Dual Band CMOS Driver Stage with Integrated 5.2 GHz Power Amplifier
T2 - IEICE TRANSACTIONS on Electronics
SP - 1772
EP - 1778
AU - YunSeong EO
AU - KwangDu LEE
PY - 2005
DO - 10.1093/ietele/e88-c.8.1772
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2005
AB - A 2.4/5.2 GHz CMOS dual band driver stages with integrated 5.2 GHz power amplifier is presented in this work. For more accurate simulation of high power CMOS amplifier, a re-optimized macro NMOS model is used, whose nonlinear model accuracy is enhanced and its validity is proved by comparing load pull simulation with measurement. In order to achieve band selection, it has switched matching circuits at the first stage and SPDT path switch following them. At 2.4 GHz and 5.2 GHz bands, the achieved values of Psat of the switched amplifier are 9.7 dBm and 19.5 dBm, respectively. The achieved PAE is 15.3% at 5.2 GHz.
ER -