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IEICE TRANSACTIONS on Electronics

Preliminary Demonstration of 1.0 V CMOS Imager with Semi-Pixel-Level ADC Based on Pulse-Width-Modulation Pixel Readout

Keiichiro KAGAWA, Makoto SHOUHO, Kazuo HASHIGUCHI, Masahiro NUNOSHITA, Jun OHTA

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Summary :

We demonstrate low-voltage operation of a CMOS imager with an in-pixel large-gain comparator without degradation of the dynamic range by using a pulse-width-modulation scheme in pixel readout. Experimental results showed a dynamic range of 57 dB with a 1.0 V power supply voltage at the pixel array block, which demonstrates the possibility of low-voltage, single-power-supply operation of imagers fabricated with deep-submicron CMOS technologies.

Publication
IEICE TRANSACTIONS on Electronics Vol.E90-C No.10 pp.2007-2011
Publication Date
2007/10/01
Publicized
Online ISSN
1745-1353
DOI
10.1093/ietele/e90-c.10.2007
Type of Manuscript
Special Section LETTER (Special Section on VLSI Technology toward Frontiers of New Market)
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