IEICE TRANSACTIONS on Electronics
Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems
Summary :
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for 40% or more of the total energy consumed in these systems. Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of digital systems continues to grow. Moreover, temperature is another factor that exponentially increases the leakage current. In this paper, we show the effect of temperature on the optimal (minimum-energy-consuming) cache configuration for low energy embedded systems. Our results show that for a given application and technology, the optimal cache size moves toward smaller caches at higher temperatures, due to the larger leakage. Consequently, a Temperature-Aware Configurable Cache (TACC) is an effective way to save energy in finer technologies when the embedded system is used in different temperatures. Our results show that using a TACC, up to 61% energy can be saved for instruction cache and 77% for data cache compared to a configurable cache that has been configured for only the corner-case temperature (100
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E91-C No.4 pp.418-431
- Publication Date
- 2008/04/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e91-c.4.418
- Type of Manuscript
- Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
- Category
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Hamid NOORI, Maziar GOUDARZI, Koji INOUE, Kazuaki MURAKAMI, "Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems" in IEICE TRANSACTIONS on Electronics,
vol. E91-C, no. 4, pp. 418-431, April 2008, doi: 10.1093/ietele/e91-c.4.418.
Abstract: Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for 40% or more of the total energy consumed in these systems. Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of digital systems continues to grow. Moreover, temperature is another factor that exponentially increases the leakage current. In this paper, we show the effect of temperature on the optimal (minimum-energy-consuming) cache configuration for low energy embedded systems. Our results show that for a given application and technology, the optimal cache size moves toward smaller caches at higher temperatures, due to the larger leakage. Consequently, a Temperature-Aware Configurable Cache (TACC) is an effective way to save energy in finer technologies when the embedded system is used in different temperatures. Our results show that using a TACC, up to 61% energy can be saved for instruction cache and 77% for data cache compared to a configurable cache that has been configured for only the corner-case temperature (100
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e91-c.4.418/_p
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@ARTICLE{e91-c_4_418,
author={Hamid NOORI, Maziar GOUDARZI, Koji INOUE, Kazuaki MURAKAMI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems},
year={2008},
volume={E91-C},
number={4},
pages={418-431},
abstract={Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for 40% or more of the total energy consumed in these systems. Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of digital systems continues to grow. Moreover, temperature is another factor that exponentially increases the leakage current. In this paper, we show the effect of temperature on the optimal (minimum-energy-consuming) cache configuration for low energy embedded systems. Our results show that for a given application and technology, the optimal cache size moves toward smaller caches at higher temperatures, due to the larger leakage. Consequently, a Temperature-Aware Configurable Cache (TACC) is an effective way to save energy in finer technologies when the embedded system is used in different temperatures. Our results show that using a TACC, up to 61% energy can be saved for instruction cache and 77% for data cache compared to a configurable cache that has been configured for only the corner-case temperature (100
keywords={},
doi={10.1093/ietele/e91-c.4.418},
ISSN={1745-1353},
month={April},}
Copy
TY - JOUR
TI - Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems
T2 - IEICE TRANSACTIONS on Electronics
SP - 418
EP - 431
AU - Hamid NOORI
AU - Maziar GOUDARZI
AU - Koji INOUE
AU - Kazuaki MURAKAMI
PY - 2008
DO - 10.1093/ietele/e91-c.4.418
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E91-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2008
AB - Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for 40% or more of the total energy consumed in these systems. Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of digital systems continues to grow. Moreover, temperature is another factor that exponentially increases the leakage current. In this paper, we show the effect of temperature on the optimal (minimum-energy-consuming) cache configuration for low energy embedded systems. Our results show that for a given application and technology, the optimal cache size moves toward smaller caches at higher temperatures, due to the larger leakage. Consequently, a Temperature-Aware Configurable Cache (TACC) is an effective way to save energy in finer technologies when the embedded system is used in different temperatures. Our results show that using a TACC, up to 61% energy can be saved for instruction cache and 77% for data cache compared to a configurable cache that has been configured for only the corner-case temperature (100
ER -
English
