IEICE TRANSACTIONS on Electronics
A Special-Purpose LSI for Inverse Kinematics Computation
Summary :
This paper presents a special-purpose LSI chip for inverse kinematics computation of robot manipulators. It is shown that inverse kinematic solutions of kinematically simple manipulators can be systematically described with the two-dimensional (2-D) vector rotation. The chip is fabricated with the 1.5-µm CMOS gate array. The arithmetic unit on the chip is designed using the COordinate Rotation DIgital Computer (CORDIC) algorithms, and it performs six types of operations based on the 2-D vector rotation at high speed. Pipelining is used to enhance the operating ratio of the unit to 100%. The computation time of a special purpose processor which is composed of the chip and a few memory chips is approximately 50 µs for a typical six degree-of-freedom manipulator. Moreover, the chip can be used for various types of manipulators, and the software development is very easy.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E74-C No.11 pp.3829-3837
- Publication Date
- 1991/11/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor)
- Category
- Dedicated Processors
Authors
Keyword
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Michitaka KAMEYAMA, Takao MATSUMOTO, Hideki EGAMI, Tatsuo HIGUCHI, "A Special-Purpose LSI for Inverse Kinematics Computation" in IEICE TRANSACTIONS on Electronics,
vol. E74-C, no. 11, pp. 3829-3837, November 1991, doi: .
Abstract: This paper presents a special-purpose LSI chip for inverse kinematics computation of robot manipulators. It is shown that inverse kinematic solutions of kinematically simple manipulators can be systematically described with the two-dimensional (2-D) vector rotation. The chip is fabricated with the 1.5-µm CMOS gate array. The arithmetic unit on the chip is designed using the COordinate Rotation DIgital Computer (CORDIC) algorithms, and it performs six types of operations based on the 2-D vector rotation at high speed. Pipelining is used to enhance the operating ratio of the unit to 100%. The computation time of a special purpose processor which is composed of the chip and a few memory chips is approximately 50 µs for a typical six degree-of-freedom manipulator. Moreover, the chip can be used for various types of manipulators, and the software development is very easy.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e74-c_11_3829/_p
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@ARTICLE{e74-c_11_3829,
author={Michitaka KAMEYAMA, Takao MATSUMOTO, Hideki EGAMI, Tatsuo HIGUCHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Special-Purpose LSI for Inverse Kinematics Computation},
year={1991},
volume={E74-C},
number={11},
pages={3829-3837},
abstract={This paper presents a special-purpose LSI chip for inverse kinematics computation of robot manipulators. It is shown that inverse kinematic solutions of kinematically simple manipulators can be systematically described with the two-dimensional (2-D) vector rotation. The chip is fabricated with the 1.5-µm CMOS gate array. The arithmetic unit on the chip is designed using the COordinate Rotation DIgital Computer (CORDIC) algorithms, and it performs six types of operations based on the 2-D vector rotation at high speed. Pipelining is used to enhance the operating ratio of the unit to 100%. The computation time of a special purpose processor which is composed of the chip and a few memory chips is approximately 50 µs for a typical six degree-of-freedom manipulator. Moreover, the chip can be used for various types of manipulators, and the software development is very easy.},
keywords={},
doi={},
ISSN={},
month={November},}
Copy
TY - JOUR
TI - A Special-Purpose LSI for Inverse Kinematics Computation
T2 - IEICE TRANSACTIONS on Electronics
SP - 3829
EP - 3837
AU - Michitaka KAMEYAMA
AU - Takao MATSUMOTO
AU - Hideki EGAMI
AU - Tatsuo HIGUCHI
PY - 1991
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E74-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 1991
AB - This paper presents a special-purpose LSI chip for inverse kinematics computation of robot manipulators. It is shown that inverse kinematic solutions of kinematically simple manipulators can be systematically described with the two-dimensional (2-D) vector rotation. The chip is fabricated with the 1.5-µm CMOS gate array. The arithmetic unit on the chip is designed using the COordinate Rotation DIgital Computer (CORDIC) algorithms, and it performs six types of operations based on the 2-D vector rotation at high speed. Pipelining is used to enhance the operating ratio of the unit to 100%. The computation time of a special purpose processor which is composed of the chip and a few memory chips is approximately 50 µs for a typical six degree-of-freedom manipulator. Moreover, the chip can be used for various types of manipulators, and the software development is very easy.
ER -
English
