Recent advances in VLSI memories have enabled integration of 10 to 30 million devices on prototype chips for 16 Mbit DRAMs, 16 Mbit EPROMs, and 4 Mbit SRAMs. An experimental 64 Mbit DRAM recently reported clearly shows that an integration density of more than 100 million devices on a chip will be feasible in the near future. These advances have been made not only by progress in fine processing technology, but also by the development of three-dimensional memory cells such as trench capacitor cells and stacked capacitor cells for DRAMs and polysilicon PMOS load cells for SRAMs. Various circuit innovations to increase the signal-to-noise ratio and circuit speed have been, and will continue to be, essential. Future circuits will be required to operate at very low voltages, and the prototype 64 Mbit DRAM has shown that an operating voltage as low as 1.5 volts is feasible. Improvements in packaging technology for reducing package volume and footprint area, as well as for production of multipackage modules, are also becoming more and more important.
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Toshiaki MASUHARA, Kiyoo ITOH, Koichi SEKI, Katsuro SASAKI, "VLSI Memories: Present Status and Future Prospects" in IEICE TRANSACTIONS on Electronics,
vol. E74-C, no. 1, pp. 130-141, January 1991, doi: .
Abstract: Recent advances in VLSI memories have enabled integration of 10 to 30 million devices on prototype chips for 16 Mbit DRAMs, 16 Mbit EPROMs, and 4 Mbit SRAMs. An experimental 64 Mbit DRAM recently reported clearly shows that an integration density of more than 100 million devices on a chip will be feasible in the near future. These advances have been made not only by progress in fine processing technology, but also by the development of three-dimensional memory cells such as trench capacitor cells and stacked capacitor cells for DRAMs and polysilicon PMOS load cells for SRAMs. Various circuit innovations to increase the signal-to-noise ratio and circuit speed have been, and will continue to be, essential. Future circuits will be required to operate at very low voltages, and the prototype 64 Mbit DRAM has shown that an operating voltage as low as 1.5 volts is feasible. Improvements in packaging technology for reducing package volume and footprint area, as well as for production of multipackage modules, are also becoming more and more important.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e74-c_1_130/_p
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@ARTICLE{e74-c_1_130,
author={Toshiaki MASUHARA, Kiyoo ITOH, Koichi SEKI, Katsuro SASAKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={VLSI Memories: Present Status and Future Prospects},
year={1991},
volume={E74-C},
number={1},
pages={130-141},
abstract={Recent advances in VLSI memories have enabled integration of 10 to 30 million devices on prototype chips for 16 Mbit DRAMs, 16 Mbit EPROMs, and 4 Mbit SRAMs. An experimental 64 Mbit DRAM recently reported clearly shows that an integration density of more than 100 million devices on a chip will be feasible in the near future. These advances have been made not only by progress in fine processing technology, but also by the development of three-dimensional memory cells such as trench capacitor cells and stacked capacitor cells for DRAMs and polysilicon PMOS load cells for SRAMs. Various circuit innovations to increase the signal-to-noise ratio and circuit speed have been, and will continue to be, essential. Future circuits will be required to operate at very low voltages, and the prototype 64 Mbit DRAM has shown that an operating voltage as low as 1.5 volts is feasible. Improvements in packaging technology for reducing package volume and footprint area, as well as for production of multipackage modules, are also becoming more and more important.},
keywords={},
doi={},
ISSN={},
month={January},}
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TY - JOUR
TI - VLSI Memories: Present Status and Future Prospects
T2 - IEICE TRANSACTIONS on Electronics
SP - 130
EP - 141
AU - Toshiaki MASUHARA
AU - Kiyoo ITOH
AU - Koichi SEKI
AU - Katsuro SASAKI
PY - 1991
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E74-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 1991
AB - Recent advances in VLSI memories have enabled integration of 10 to 30 million devices on prototype chips for 16 Mbit DRAMs, 16 Mbit EPROMs, and 4 Mbit SRAMs. An experimental 64 Mbit DRAM recently reported clearly shows that an integration density of more than 100 million devices on a chip will be feasible in the near future. These advances have been made not only by progress in fine processing technology, but also by the development of three-dimensional memory cells such as trench capacitor cells and stacked capacitor cells for DRAMs and polysilicon PMOS load cells for SRAMs. Various circuit innovations to increase the signal-to-noise ratio and circuit speed have been, and will continue to be, essential. Future circuits will be required to operate at very low voltages, and the prototype 64 Mbit DRAM has shown that an operating voltage as low as 1.5 volts is feasible. Improvements in packaging technology for reducing package volume and footprint area, as well as for production of multipackage modules, are also becoming more and more important.
ER -