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Kazuhiko UMEZAWA, Tukasa MIZUNO, Hideki NISHIMORI, "GaAs Multichip Package for Supercomputer" in IEICE TRANSACTIONS on Electronics,
vol. E74-C, no. 8, pp. 2309-2316, August 1991, doi: .
Abstract: A high performance multichip package (MCP) which consists of a multilayer substrate (MLS) and GaAs devices has been developed for supercomputer. The MLS is 100 mm100 mm size and fabricated with polyimide dielectric layers and 7 Cu/Ni thin film conductor layers including 2 signal layers on a wafer. The signal line is 25 µm wide and has 60 µm center to center spacings, the polyimide dielectric layer is 20 µm thick, and the minimum via hole size is 40 µm square. Maximum 21 GaAs devices and 47 Si devices are mounted on the multilayer substrate. The GaAs devices are 16 memory chips and 5 logic chips and are packed in leadless chip carriers (LCCs). LCCs are attached on the substrate by In/Pb soldering technique. Si devices are 52-lead TAB (Tape Automated Bonding) chips and directly attached on the substrate. The multichip package has 408 I/Os and power dissipation is approximately 150 W. This package is immersed in perfluorocarbon liquid and cooled by forced convection. The cooling capacity is studied by varing flow rate from 2 to 10 cm/s and confirmed to be sufficient to cool this high performance package. All the devices can be operated below 70. These new packaging technologies realized system performance over 10 GFOLPS, which is the world's highest.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e74-c_8_2309/_p
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@ARTICLE{e74-c_8_2309,
author={Kazuhiko UMEZAWA, Tukasa MIZUNO, Hideki NISHIMORI, },
journal={IEICE TRANSACTIONS on Electronics},
title={GaAs Multichip Package for Supercomputer},
year={1991},
volume={E74-C},
number={8},
pages={2309-2316},
abstract={A high performance multichip package (MCP) which consists of a multilayer substrate (MLS) and GaAs devices has been developed for supercomputer. The MLS is 100 mm100 mm size and fabricated with polyimide dielectric layers and 7 Cu/Ni thin film conductor layers including 2 signal layers on a wafer. The signal line is 25 µm wide and has 60 µm center to center spacings, the polyimide dielectric layer is 20 µm thick, and the minimum via hole size is 40 µm square. Maximum 21 GaAs devices and 47 Si devices are mounted on the multilayer substrate. The GaAs devices are 16 memory chips and 5 logic chips and are packed in leadless chip carriers (LCCs). LCCs are attached on the substrate by In/Pb soldering technique. Si devices are 52-lead TAB (Tape Automated Bonding) chips and directly attached on the substrate. The multichip package has 408 I/Os and power dissipation is approximately 150 W. This package is immersed in perfluorocarbon liquid and cooled by forced convection. The cooling capacity is studied by varing flow rate from 2 to 10 cm/s and confirmed to be sufficient to cool this high performance package. All the devices can be operated below 70. These new packaging technologies realized system performance over 10 GFOLPS, which is the world's highest.},
keywords={},
doi={},
ISSN={},
month={August},}
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TY - JOUR
TI - GaAs Multichip Package for Supercomputer
T2 - IEICE TRANSACTIONS on Electronics
SP - 2309
EP - 2316
AU - Kazuhiko UMEZAWA
AU - Tukasa MIZUNO
AU - Hideki NISHIMORI
PY - 1991
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E74-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 1991
AB - A high performance multichip package (MCP) which consists of a multilayer substrate (MLS) and GaAs devices has been developed for supercomputer. The MLS is 100 mm100 mm size and fabricated with polyimide dielectric layers and 7 Cu/Ni thin film conductor layers including 2 signal layers on a wafer. The signal line is 25 µm wide and has 60 µm center to center spacings, the polyimide dielectric layer is 20 µm thick, and the minimum via hole size is 40 µm square. Maximum 21 GaAs devices and 47 Si devices are mounted on the multilayer substrate. The GaAs devices are 16 memory chips and 5 logic chips and are packed in leadless chip carriers (LCCs). LCCs are attached on the substrate by In/Pb soldering technique. Si devices are 52-lead TAB (Tape Automated Bonding) chips and directly attached on the substrate. The multichip package has 408 I/Os and power dissipation is approximately 150 W. This package is immersed in perfluorocarbon liquid and cooled by forced convection. The cooling capacity is studied by varing flow rate from 2 to 10 cm/s and confirmed to be sufficient to cool this high performance package. All the devices can be operated below 70. These new packaging technologies realized system performance over 10 GFOLPS, which is the world's highest.
ER -
English
