Design of a 4000-tap Acoustic Echo Canceller Using the Residue Number System and the Mixed-Radix Number System
Summary :
This paper presents a method for LSI implementation of a long-tap acoustic echo canceller algorithm using the residue number system (RNS) and the mixed-radix number system (MRS). It also presents a quantitative comparison of echo canceller architectures, one using the RNS and the other using the binary number system (BNS). In the RNS, addition, subtraction, and multiplication are executed quickly but scaling, overflow detection, and division are difficult. For this reason, no echo canceller using the RNS has been implemented. We therefore try to design an echo canceller architecture using the RNS and the NLMS algorithm. It is shown that the echo canceller algorithm can be effectively implemented using the RNS by introducing the MRS. The quantitative comparison of echo canceller architectures shows that a long-tap acoustic echo canceller can be implemented more effectively in terms of chip size and power dissipation by the architecture using the RNS.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E75-C No.10 pp.1232-1240
- Publication Date
- 1992/10/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Microprocessors)
- Category
- Application Specific Processors
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Satoshi MIKI, Hiroshi MIYANAGA, Hironori YAMAUCHI, "Design of a 4000-tap Acoustic Echo Canceller Using the Residue Number System and the Mixed-Radix Number System" in IEICE TRANSACTIONS on Electronics,
vol. E75-C, no. 10, pp. 1232-1240, October 1992, doi: .
Abstract: This paper presents a method for LSI implementation of a long-tap acoustic echo canceller algorithm using the residue number system (RNS) and the mixed-radix number system (MRS). It also presents a quantitative comparison of echo canceller architectures, one using the RNS and the other using the binary number system (BNS). In the RNS, addition, subtraction, and multiplication are executed quickly but scaling, overflow detection, and division are difficult. For this reason, no echo canceller using the RNS has been implemented. We therefore try to design an echo canceller architecture using the RNS and the NLMS algorithm. It is shown that the echo canceller algorithm can be effectively implemented using the RNS by introducing the MRS. The quantitative comparison of echo canceller architectures shows that a long-tap acoustic echo canceller can be implemented more effectively in terms of chip size and power dissipation by the architecture using the RNS.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e75-c_10_1232/_p
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@ARTICLE{e75-c_10_1232,
author={Satoshi MIKI, Hiroshi MIYANAGA, Hironori YAMAUCHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design of a 4000-tap Acoustic Echo Canceller Using the Residue Number System and the Mixed-Radix Number System},
year={1992},
volume={E75-C},
number={10},
pages={1232-1240},
abstract={This paper presents a method for LSI implementation of a long-tap acoustic echo canceller algorithm using the residue number system (RNS) and the mixed-radix number system (MRS). It also presents a quantitative comparison of echo canceller architectures, one using the RNS and the other using the binary number system (BNS). In the RNS, addition, subtraction, and multiplication are executed quickly but scaling, overflow detection, and division are difficult. For this reason, no echo canceller using the RNS has been implemented. We therefore try to design an echo canceller architecture using the RNS and the NLMS algorithm. It is shown that the echo canceller algorithm can be effectively implemented using the RNS by introducing the MRS. The quantitative comparison of echo canceller architectures shows that a long-tap acoustic echo canceller can be implemented more effectively in terms of chip size and power dissipation by the architecture using the RNS.},
keywords={},
doi={},
ISSN={},
month={October},}
Copy
TY - JOUR
TI - Design of a 4000-tap Acoustic Echo Canceller Using the Residue Number System and the Mixed-Radix Number System
T2 - IEICE TRANSACTIONS on Electronics
SP - 1232
EP - 1240
AU - Satoshi MIKI
AU - Hiroshi MIYANAGA
AU - Hironori YAMAUCHI
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E75-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 1992
AB - This paper presents a method for LSI implementation of a long-tap acoustic echo canceller algorithm using the residue number system (RNS) and the mixed-radix number system (MRS). It also presents a quantitative comparison of echo canceller architectures, one using the RNS and the other using the binary number system (BNS). In the RNS, addition, subtraction, and multiplication are executed quickly but scaling, overflow detection, and division are difficult. For this reason, no echo canceller using the RNS has been implemented. We therefore try to design an echo canceller architecture using the RNS and the NLMS algorithm. It is shown that the echo canceller algorithm can be effectively implemented using the RNS by introducing the MRS. The quantitative comparison of echo canceller architectures shows that a long-tap acoustic echo canceller can be implemented more effectively in terms of chip size and power dissipation by the architecture using the RNS.
ER -
English
