An Effective Defect-Repair Scheme for a High Speed SRAM
Summary :
To make a fast Bi-CMOS SRAM yield high without speed degradation, three defect-repair methods, the address comparison method, the fuse decoder method and the distributed fuse method, were considered in detail and their advantages and disadvantages were made clear. The distributed fuse method is demonstrated to be further improved by a built-in fuse word driver and a built-in fuse column selector, and fuse analog switches. This enhanced distributed fuse scheme was examined in a fast Bi-CMOS SRAM. A maximun access time of 14 ns and a chip size of 8.8 mm
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E76-C No.11 pp.1620-1625
- Publication Date
- 1993/11/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on LSI Memories)
- Category
- SRAM
Authors
Keyword
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Sadayuki OOKUMA, Katsuyuki SATO, Akira IDE, Hideyuki AOKI, Takashi AKIOKA, Hideaki UCHIDA, "An Effective Defect-Repair Scheme for a High Speed SRAM" in IEICE TRANSACTIONS on Electronics,
vol. E76-C, no. 11, pp. 1620-1625, November 1993, doi: .
Abstract: To make a fast Bi-CMOS SRAM yield high without speed degradation, three defect-repair methods, the address comparison method, the fuse decoder method and the distributed fuse method, were considered in detail and their advantages and disadvantages were made clear. The distributed fuse method is demonstrated to be further improved by a built-in fuse word driver and a built-in fuse column selector, and fuse analog switches. This enhanced distributed fuse scheme was examined in a fast Bi-CMOS SRAM. A maximun access time of 14 ns and a chip size of 8.8 mm
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e76-c_11_1620/_p
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@ARTICLE{e76-c_11_1620,
author={Sadayuki OOKUMA, Katsuyuki SATO, Akira IDE, Hideyuki AOKI, Takashi AKIOKA, Hideaki UCHIDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Effective Defect-Repair Scheme for a High Speed SRAM},
year={1993},
volume={E76-C},
number={11},
pages={1620-1625},
abstract={To make a fast Bi-CMOS SRAM yield high without speed degradation, three defect-repair methods, the address comparison method, the fuse decoder method and the distributed fuse method, were considered in detail and their advantages and disadvantages were made clear. The distributed fuse method is demonstrated to be further improved by a built-in fuse word driver and a built-in fuse column selector, and fuse analog switches. This enhanced distributed fuse scheme was examined in a fast Bi-CMOS SRAM. A maximun access time of 14 ns and a chip size of 8.8 mm
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - An Effective Defect-Repair Scheme for a High Speed SRAM
T2 - IEICE TRANSACTIONS on Electronics
SP - 1620
EP - 1625
AU - Sadayuki OOKUMA
AU - Katsuyuki SATO
AU - Akira IDE
AU - Hideyuki AOKI
AU - Takashi AKIOKA
AU - Hideaki UCHIDA
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E76-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 1993
AB - To make a fast Bi-CMOS SRAM yield high without speed degradation, three defect-repair methods, the address comparison method, the fuse decoder method and the distributed fuse method, were considered in detail and their advantages and disadvantages were made clear. The distributed fuse method is demonstrated to be further improved by a built-in fuse word driver and a built-in fuse column selector, and fuse analog switches. This enhanced distributed fuse scheme was examined in a fast Bi-CMOS SRAM. A maximun access time of 14 ns and a chip size of 8.8 mm
ER -
English
