Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

David K. SU; Marc J. LOINAZ; Shoichi MASUI; Bruce A. WOOLEY

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

David K. SU, Marc J. LOINAZ, Shoichi MASUI, Bruce A. WOOLEY

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Switching transients in digital MOS circuits can perturb analog circuits integrated on the same die by means of coupling through the substrate. This paper describes an experimental technique for observing the effects of such substrate noise. Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprised of an epitaxial layer grown on a heavily doped bulk wafer. Observations indicate that reducing the inductance in the substrate bias is more effective than either physical separation or guard rings in minimizing substrate crosstalk between analog and digital circuits fabricated on epitaxial substrates. To enhance understanding of the experimental results, two-dimensional device simulations are used to show how crosstalk propagates via the heavily doped bulk. Device simulations are also used to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry. Finally, a method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates has been developed using a single-node substrate model.

Publication: IEICE TRANSACTIONS on Electronics Vol.E76-C No.5 pp.760-770

Publication Date: 1993/05/25

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Type of Manuscript: Special Section PAPER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))

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David K. SU
Marc J. LOINAZ
Shoichi MASUI
Bruce A. WOOLEY

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David K. SU, Marc J. LOINAZ, Shoichi MASUI, Bruce A. WOOLEY, "Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits" in IEICE TRANSACTIONS on Electronics, vol. E76-C, no. 5, pp. 760-770, May 1993, doi: .
Abstract: Switching transients in digital MOS circuits can perturb analog circuits integrated on the same die by means of coupling through the substrate. This paper describes an experimental technique for observing the effects of such substrate noise. Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprised of an epitaxial layer grown on a heavily doped bulk wafer. Observations indicate that reducing the inductance in the substrate bias is more effective than either physical separation or guard rings in minimizing substrate crosstalk between analog and digital circuits fabricated on epitaxial substrates. To enhance understanding of the experimental results, two-dimensional device simulations are used to show how crosstalk propagates via the heavily doped bulk. Device simulations are also used to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry. Finally, a method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates has been developed using a single-node substrate model.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e76-c_5_760/_p

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@ARTICLE{e76-c_5_760,
author={David K. SU, Marc J. LOINAZ, Shoichi MASUI, Bruce A. WOOLEY, },
journal={IEICE TRANSACTIONS on Electronics},
title={Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits},
year={1993},
volume={E76-C},
number={5},
pages={760-770},
abstract={Switching transients in digital MOS circuits can perturb analog circuits integrated on the same die by means of coupling through the substrate. This paper describes an experimental technique for observing the effects of such substrate noise. Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprised of an epitaxial layer grown on a heavily doped bulk wafer. Observations indicate that reducing the inductance in the substrate bias is more effective than either physical separation or guard rings in minimizing substrate crosstalk between analog and digital circuits fabricated on epitaxial substrates. To enhance understanding of the experimental results, two-dimensional device simulations are used to show how crosstalk propagates via the heavily doped bulk. Device simulations are also used to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry. Finally, a method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates has been developed using a single-node substrate model.},
keywords={},
doi={},
ISSN={},
month={May},}

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TY - JOUR
TI - Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 760
EP - 770
AU - David K. SU
AU - Marc J. LOINAZ
AU - Shoichi MASUI
AU - Bruce A. WOOLEY
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E76-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 1993
AB - Switching transients in digital MOS circuits can perturb analog circuits integrated on the same die by means of coupling through the substrate. This paper describes an experimental technique for observing the effects of such substrate noise. Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprised of an epitaxial layer grown on a heavily doped bulk wafer. Observations indicate that reducing the inductance in the substrate bias is more effective than either physical separation or guard rings in minimizing substrate crosstalk between analog and digital circuits fabricated on epitaxial substrates. To enhance understanding of the experimental results, two-dimensional device simulations are used to show how crosstalk propagates via the heavily doped bulk. Device simulations are also used to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry. Finally, a method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates has been developed using a single-node substrate model.
ER -