A CCD/CMOS-Based Imager with Integrated Focal Plane Signal Processing

Craig L. KEAST; Charles G. SODINI

A CCD/CMOS-Based Imager with Integrated Focal Plane Signal Processing

Craig L. KEAST, Charles G. SODINI

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Using a CCD/CMOS technology, a fully parallel 4 4 focal plane processor, which performs image acquisition, smoothing, and segmentation, had been fabricated and characterized. In this chip, image brightness is converted into signal charge using CCD imaging techniques. The Gaussian smoothing operation is approximated by the repeated application of a simple nearest neighbor binomial convolution mask, realizing the first known use of a true two-dimensional charge division and transfer process. The design allows full control of the spatial extent of the smoothing operation, and incorporates segmentation circuits with global variable threshold control at each pixel location to preserve edges in the image. The processed image is read out using a standard CCD clocking scheme.

Publication: IEICE TRANSACTIONS on Electronics Vol.E76-C No.5 pp.771-777

Publication Date: 1993/05/25

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Type of Manuscript: Special Section PAPER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))

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Craig L. KEAST
Charles G. SODINI

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Craig L. KEAST, Charles G. SODINI, "A CCD/CMOS-Based Imager with Integrated Focal Plane Signal Processing" in IEICE TRANSACTIONS on Electronics, vol. E76-C, no. 5, pp. 771-777, May 1993, doi: .
Abstract: Using a CCD/CMOS technology, a fully parallel 4 4 focal plane processor, which performs image acquisition, smoothing, and segmentation, had been fabricated and characterized. In this chip, image brightness is converted into signal charge using CCD imaging techniques. The Gaussian smoothing operation is approximated by the repeated application of a simple nearest neighbor binomial convolution mask, realizing the first known use of a true two-dimensional charge division and transfer process. The design allows full control of the spatial extent of the smoothing operation, and incorporates segmentation circuits with global variable threshold control at each pixel location to preserve edges in the image. The processed image is read out using a standard CCD clocking scheme.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e76-c_5_771/_p

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@ARTICLE{e76-c_5_771,
author={Craig L. KEAST, Charles G. SODINI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A CCD/CMOS-Based Imager with Integrated Focal Plane Signal Processing},
year={1993},
volume={E76-C},
number={5},
pages={771-777},
abstract={Using a CCD/CMOS technology, a fully parallel 4 4 focal plane processor, which performs image acquisition, smoothing, and segmentation, had been fabricated and characterized. In this chip, image brightness is converted into signal charge using CCD imaging techniques. The Gaussian smoothing operation is approximated by the repeated application of a simple nearest neighbor binomial convolution mask, realizing the first known use of a true two-dimensional charge division and transfer process. The design allows full control of the spatial extent of the smoothing operation, and incorporates segmentation circuits with global variable threshold control at each pixel location to preserve edges in the image. The processed image is read out using a standard CCD clocking scheme.},
keywords={},
doi={},
ISSN={},
month={May},}

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TY - JOUR
TI - A CCD/CMOS-Based Imager with Integrated Focal Plane Signal Processing
T2 - IEICE TRANSACTIONS on Electronics
SP - 771
EP - 777
AU - Craig L. KEAST
AU - Charles G. SODINI
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E76-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 1993
AB - Using a CCD/CMOS technology, a fully parallel 4 4 focal plane processor, which performs image acquisition, smoothing, and segmentation, had been fabricated and characterized. In this chip, image brightness is converted into signal charge using CCD imaging techniques. The Gaussian smoothing operation is approximated by the repeated application of a simple nearest neighbor binomial convolution mask, realizing the first known use of a true two-dimensional charge division and transfer process. The design allows full control of the spatial extent of the smoothing operation, and incorporates segmentation circuits with global variable threshold control at each pixel location to preserve edges in the image. The processed image is read out using a standard CCD clocking scheme.
ER -