An Automated On-Chip Direct Wiring Modification for High Performance LSIs
Summary :
It has become more important to shorten development periods of high performance computer systems and their LSIs. During debugging of computer prototypes, logic designers request very frequent LSI refabrication to change logic circuits and to add some functions in spite of their extensive logic simulation by several GFLOPS supercomputers. To meet these demands, an automated on-chip direct wiring modification system has been developed, which enables wire-cut and via-digging by a precise focused ion beam machine, and via-filling and jumper-writing by a laser CVD machine, directly on pre-redesign (original) chips. This modification system was applied to LSI reworks during the development of Hitachi large scale computers M-880 and S-3800, and contributed to shorten system debugging period by four to six months.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E77-C No.2 pp.263-272
- Publication Date
- 1994/02/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Integrated Electronics
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Akio ANZAI, Mikinori KAWAJI, Takahiko TAKAHASHI, "An Automated On-Chip Direct Wiring Modification for High Performance LSIs" in IEICE TRANSACTIONS on Electronics,
vol. E77-C, no. 2, pp. 263-272, February 1994, doi: .
Abstract: It has become more important to shorten development periods of high performance computer systems and their LSIs. During debugging of computer prototypes, logic designers request very frequent LSI refabrication to change logic circuits and to add some functions in spite of their extensive logic simulation by several GFLOPS supercomputers. To meet these demands, an automated on-chip direct wiring modification system has been developed, which enables wire-cut and via-digging by a precise focused ion beam machine, and via-filling and jumper-writing by a laser CVD machine, directly on pre-redesign (original) chips. This modification system was applied to LSI reworks during the development of Hitachi large scale computers M-880 and S-3800, and contributed to shorten system debugging period by four to six months.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e77-c_2_263/_p
Copy
@ARTICLE{e77-c_2_263,
author={Akio ANZAI, Mikinori KAWAJI, Takahiko TAKAHASHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Automated On-Chip Direct Wiring Modification for High Performance LSIs},
year={1994},
volume={E77-C},
number={2},
pages={263-272},
abstract={It has become more important to shorten development periods of high performance computer systems and their LSIs. During debugging of computer prototypes, logic designers request very frequent LSI refabrication to change logic circuits and to add some functions in spite of their extensive logic simulation by several GFLOPS supercomputers. To meet these demands, an automated on-chip direct wiring modification system has been developed, which enables wire-cut and via-digging by a precise focused ion beam machine, and via-filling and jumper-writing by a laser CVD machine, directly on pre-redesign (original) chips. This modification system was applied to LSI reworks during the development of Hitachi large scale computers M-880 and S-3800, and contributed to shorten system debugging period by four to six months.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - An Automated On-Chip Direct Wiring Modification for High Performance LSIs
T2 - IEICE TRANSACTIONS on Electronics
SP - 263
EP - 272
AU - Akio ANZAI
AU - Mikinori KAWAJI
AU - Takahiko TAKAHASHI
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E77-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 1994
AB - It has become more important to shorten development periods of high performance computer systems and their LSIs. During debugging of computer prototypes, logic designers request very frequent LSI refabrication to change logic circuits and to add some functions in spite of their extensive logic simulation by several GFLOPS supercomputers. To meet these demands, an automated on-chip direct wiring modification system has been developed, which enables wire-cut and via-digging by a precise focused ion beam machine, and via-filling and jumper-writing by a laser CVD machine, directly on pre-redesign (original) chips. This modification system was applied to LSI reworks during the development of Hitachi large scale computers M-880 and S-3800, and contributed to shorten system debugging period by four to six months.
ER -
English
