A 33-cm-Diagonal High-Resolution TFT-LCD with Fully Self-Aligned a-Si TFTs

Naoto HIRANO; Naoyasu IKEDA; Shinichi HISHIDA; Setsu KANEKO

A 33-cm-Diagonal High-Resolution TFT-LCD with Fully Self-Aligned a-Si TFTs

Naoto HIRANO, Naoyasu IKEDA, Shinichi HISHIDA, Setsu KANEKO

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A 33-cm-Diagonal High-Resolution(1280 1024RGB, which stands for red, green, and blue) TFT-LCD with low, uniform parasitic capacitance between gate electrodes and source/drain electrodes has been developed using Fully Self-Aligned a-Si TFTs. The fabricated TFT-LCD shows no visible seams between block shot exposure regions, even in the display of gray images. In this paper, we describe(1) our full self-alignment technology for the TFTs, including the fabrication process and the technology for reducing OFF current in the TFTs under illumination, (2) SPICE simulation for estimating pixel voltage shift in the fabricated TFT-LCD, and (3) performance results for the fabricated TFT-LCD.

Publication: IEICE TRANSACTIONS on Electronics Vol.E79-C No.8 pp.1103-1108

Publication Date: 1996/08/25

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Type of Manuscript: Special Section PAPER (Special Issue on Liquid-Crystal Displays)

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Naoto HIRANO, Naoyasu IKEDA, Shinichi HISHIDA, Setsu KANEKO, "A 33-cm-Diagonal High-Resolution TFT-LCD with Fully Self-Aligned a-Si TFTs" in IEICE TRANSACTIONS on Electronics, vol. E79-C, no. 8, pp. 1103-1108, August 1996, doi: .
Abstract: A 33-cm-Diagonal High-Resolution(1280 1024RGB, which stands for red, green, and blue) TFT-LCD with low, uniform parasitic capacitance between gate electrodes and source/drain electrodes has been developed using Fully Self-Aligned a-Si TFTs. The fabricated TFT-LCD shows no visible seams between block shot exposure regions, even in the display of gray images. In this paper, we describe(1) our full self-alignment technology for the TFTs, including the fabrication process and the technology for reducing OFF current in the TFTs under illumination, (2) SPICE simulation for estimating pixel voltage shift in the fabricated TFT-LCD, and (3) performance results for the fabricated TFT-LCD.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e79-c_8_1103/_p

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@ARTICLE{e79-c_8_1103,
author={Naoto HIRANO, Naoyasu IKEDA, Shinichi HISHIDA, Setsu KANEKO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 33-cm-Diagonal High-Resolution TFT-LCD with Fully Self-Aligned a-Si TFTs},
year={1996},
volume={E79-C},
number={8},
pages={1103-1108},
abstract={A 33-cm-Diagonal High-Resolution(1280 1024RGB, which stands for red, green, and blue) TFT-LCD with low, uniform parasitic capacitance between gate electrodes and source/drain electrodes has been developed using Fully Self-Aligned a-Si TFTs. The fabricated TFT-LCD shows no visible seams between block shot exposure regions, even in the display of gray images. In this paper, we describe(1) our full self-alignment technology for the TFTs, including the fabrication process and the technology for reducing OFF current in the TFTs under illumination, (2) SPICE simulation for estimating pixel voltage shift in the fabricated TFT-LCD, and (3) performance results for the fabricated TFT-LCD.},
keywords={},
doi={},
ISSN={},
month={August},}

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TY - JOUR
TI - A 33-cm-Diagonal High-Resolution TFT-LCD with Fully Self-Aligned a-Si TFTs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1103
EP - 1108
AU - Naoto HIRANO
AU - Naoyasu IKEDA
AU - Shinichi HISHIDA
AU - Setsu KANEKO
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E79-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 1996
AB - A 33-cm-Diagonal High-Resolution(1280 1024RGB, which stands for red, green, and blue) TFT-LCD with low, uniform parasitic capacitance between gate electrodes and source/drain electrodes has been developed using Fully Self-Aligned a-Si TFTs. The fabricated TFT-LCD shows no visible seams between block shot exposure regions, even in the display of gray images. In this paper, we describe(1) our full self-alignment technology for the TFTs, including the fabrication process and the technology for reducing OFF current in the TFTs under illumination, (2) SPICE simulation for estimating pixel voltage shift in the fabricated TFT-LCD, and (3) performance results for the fabricated TFT-LCD.
ER -