IEICE TRANSACTIONS on Electronics
New Write/Erase Operation Technology for Flash EEPROM Cells to lmprove the Read Disturb Characteristics
Summary :
This paper describes the new write/erase operation methods in order to improve the read disturb characteristics for Flash EEPROM cells which are written by channel hot electron injection and erased by F-N tunneling emission from the floating gate to the substrate. The new operation methods is either applying a reverse polarity pulse after each erase pulse or applying a series of shorter erase pulses instead of a long single erase pulse. It is confirmed that by using the above operation methods, the leakage current can be suppressed, and then the read disturb life time after 105 cycles write/erase operation is more than 10 times longer in comparison with the conventional method. This memory cell by using the proposed write/erase operation method has superior potential for application to 256 Mbit Flash memories as beyond.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E80-C No.10 pp.1317-1323
- Publication Date
- 1997/10/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Category
- Integrated Electronics
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Tetsuo ENDOH, Hirohisa IIZUKA, Riichirou SHIROTA, Fujio MASUOKA, "New Write/Erase Operation Technology for Flash EEPROM Cells to lmprove the Read Disturb Characteristics" in IEICE TRANSACTIONS on Electronics,
vol. E80-C, no. 10, pp. 1317-1323, October 1997, doi: .
Abstract: This paper describes the new write/erase operation methods in order to improve the read disturb characteristics for Flash EEPROM cells which are written by channel hot electron injection and erased by F-N tunneling emission from the floating gate to the substrate. The new operation methods is either applying a reverse polarity pulse after each erase pulse or applying a series of shorter erase pulses instead of a long single erase pulse. It is confirmed that by using the above operation methods, the leakage current can be suppressed, and then the read disturb life time after 105 cycles write/erase operation is more than 10 times longer in comparison with the conventional method. This memory cell by using the proposed write/erase operation method has superior potential for application to 256 Mbit Flash memories as beyond.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e80-c_10_1317/_p
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@ARTICLE{e80-c_10_1317,
author={Tetsuo ENDOH, Hirohisa IIZUKA, Riichirou SHIROTA, Fujio MASUOKA, },
journal={IEICE TRANSACTIONS on Electronics},
title={New Write/Erase Operation Technology for Flash EEPROM Cells to lmprove the Read Disturb Characteristics},
year={1997},
volume={E80-C},
number={10},
pages={1317-1323},
abstract={This paper describes the new write/erase operation methods in order to improve the read disturb characteristics for Flash EEPROM cells which are written by channel hot electron injection and erased by F-N tunneling emission from the floating gate to the substrate. The new operation methods is either applying a reverse polarity pulse after each erase pulse or applying a series of shorter erase pulses instead of a long single erase pulse. It is confirmed that by using the above operation methods, the leakage current can be suppressed, and then the read disturb life time after 105 cycles write/erase operation is more than 10 times longer in comparison with the conventional method. This memory cell by using the proposed write/erase operation method has superior potential for application to 256 Mbit Flash memories as beyond.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - New Write/Erase Operation Technology for Flash EEPROM Cells to lmprove the Read Disturb Characteristics
T2 - IEICE TRANSACTIONS on Electronics
SP - 1317
EP - 1323
AU - Tetsuo ENDOH
AU - Hirohisa IIZUKA
AU - Riichirou SHIROTA
AU - Fujio MASUOKA
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E80-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 1997
AB - This paper describes the new write/erase operation methods in order to improve the read disturb characteristics for Flash EEPROM cells which are written by channel hot electron injection and erased by F-N tunneling emission from the floating gate to the substrate. The new operation methods is either applying a reverse polarity pulse after each erase pulse or applying a series of shorter erase pulses instead of a long single erase pulse. It is confirmed that by using the above operation methods, the leakage current can be suppressed, and then the read disturb life time after 105 cycles write/erase operation is more than 10 times longer in comparison with the conventional method. This memory cell by using the proposed write/erase operation method has superior potential for application to 256 Mbit Flash memories as beyond.
ER -
English
