The post-annealing process has been investigated for (Ba, Sr)TiO3 [BST] thin films employed as a capacitor dielectric in 1 Gbit dynamic random access memories (DRAMs). The effects of post-annealing on morphology, crystallinity, and dielectric properties were examined for thin film capacitors with BST prepared on Pt electrodes by liquid source chemical vapor deposition (CVD). The direct annealing of BST capacitors caused a roughening in surface morphology of the upper Pt electrodes and BST films. However, the post-annealing of capacitors with a silicon dioxide passivation layer was found to cause little change in surface morphology of Pt and BST, and also no significant deterioration in leakage current. The improvement in crystallinity of BST films through post-annealing was confirmed at a temperature in the range 700-850
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Tsuyoshi HORIKAWA, Junji TANIMURA, Takaaki KAWAHARA, Mikio YAMAMUKA, Masayoshi TARUTANI, Kouichi ONO, "Effects of Post-Annealing on Dielectric Properties of (Ba, Sr)TiO3 Thin Films Prepared by Liquid Source Chemical Vapor Deposition" in IEICE TRANSACTIONS on Electronics,
vol. E81-C, no. 4, pp. 497-504, April 1998, doi: .
Abstract: The post-annealing process has been investigated for (Ba, Sr)TiO3 [BST] thin films employed as a capacitor dielectric in 1 Gbit dynamic random access memories (DRAMs). The effects of post-annealing on morphology, crystallinity, and dielectric properties were examined for thin film capacitors with BST prepared on Pt electrodes by liquid source chemical vapor deposition (CVD). The direct annealing of BST capacitors caused a roughening in surface morphology of the upper Pt electrodes and BST films. However, the post-annealing of capacitors with a silicon dioxide passivation layer was found to cause little change in surface morphology of Pt and BST, and also no significant deterioration in leakage current. The improvement in crystallinity of BST films through post-annealing was confirmed at a temperature in the range 700-850
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e81-c_4_497/_p
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@ARTICLE{e81-c_4_497,
author={Tsuyoshi HORIKAWA, Junji TANIMURA, Takaaki KAWAHARA, Mikio YAMAMUKA, Masayoshi TARUTANI, Kouichi ONO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Effects of Post-Annealing on Dielectric Properties of (Ba, Sr)TiO3 Thin Films Prepared by Liquid Source Chemical Vapor Deposition},
year={1998},
volume={E81-C},
number={4},
pages={497-504},
abstract={The post-annealing process has been investigated for (Ba, Sr)TiO3 [BST] thin films employed as a capacitor dielectric in 1 Gbit dynamic random access memories (DRAMs). The effects of post-annealing on morphology, crystallinity, and dielectric properties were examined for thin film capacitors with BST prepared on Pt electrodes by liquid source chemical vapor deposition (CVD). The direct annealing of BST capacitors caused a roughening in surface morphology of the upper Pt electrodes and BST films. However, the post-annealing of capacitors with a silicon dioxide passivation layer was found to cause little change in surface morphology of Pt and BST, and also no significant deterioration in leakage current. The improvement in crystallinity of BST films through post-annealing was confirmed at a temperature in the range 700-850
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - Effects of Post-Annealing on Dielectric Properties of (Ba, Sr)TiO3 Thin Films Prepared by Liquid Source Chemical Vapor Deposition
T2 - IEICE TRANSACTIONS on Electronics
SP - 497
EP - 504
AU - Tsuyoshi HORIKAWA
AU - Junji TANIMURA
AU - Takaaki KAWAHARA
AU - Mikio YAMAMUKA
AU - Masayoshi TARUTANI
AU - Kouichi ONO
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E81-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 1998
AB - The post-annealing process has been investigated for (Ba, Sr)TiO3 [BST] thin films employed as a capacitor dielectric in 1 Gbit dynamic random access memories (DRAMs). The effects of post-annealing on morphology, crystallinity, and dielectric properties were examined for thin film capacitors with BST prepared on Pt electrodes by liquid source chemical vapor deposition (CVD). The direct annealing of BST capacitors caused a roughening in surface morphology of the upper Pt electrodes and BST films. However, the post-annealing of capacitors with a silicon dioxide passivation layer was found to cause little change in surface morphology of Pt and BST, and also no significant deterioration in leakage current. The improvement in crystallinity of BST films through post-annealing was confirmed at a temperature in the range 700-850
ER -