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Kiyomitsu ONODERA, Kazumi NISHIMURA, Takumi NITTONO, Yasuro YAMANE, Kimiyoshi YAMASAKI, "Symmetric and Asymmetric InGaP/InGaAs/GaAs Heterostructure MESFETs and Their Application to V-Band Amplifiers" in IEICE TRANSACTIONS on Electronics,
vol. E81-C, no. 6, pp. 868-875, June 1998, doi: .
Abstract: Self-aligned T-shaped Au/WSiN gate i-InGaP/n-InGaAs/i-GaAs heterostructure MESFETs with a BP-LDD structure were developed for application to microwave and millimeter-wave communication systems. Owing to the use of tilted-angle n+-ion-implantation, symmetric and asymmetric structures FETs can be fabricated on the same chip and low noise, high breakdown voltage, and high power gain can be attained simultaneously. The fabricated symmetric FETs, with a gate length of 0. 13 µm, exhibit a current cutoff frequency of more than 70 GHz and a minimum noise figure as low as 1. 0 dB at 20 GHz, while the gate-drain breakdown voltage is more than 8 V and the MSG is as high as 7. 8 dB at 60 GHz in the asymmetric FETs on the same chip. V-band MMIC amplifiers fabricated using symmetric FETs exhibit a gain of more than 9 dB and a noise figure of 6 dB over the 50 to 60 GHz frequency range.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e81-c_6_868/_p
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@ARTICLE{e81-c_6_868,
author={Kiyomitsu ONODERA, Kazumi NISHIMURA, Takumi NITTONO, Yasuro YAMANE, Kimiyoshi YAMASAKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Symmetric and Asymmetric InGaP/InGaAs/GaAs Heterostructure MESFETs and Their Application to V-Band Amplifiers},
year={1998},
volume={E81-C},
number={6},
pages={868-875},
abstract={Self-aligned T-shaped Au/WSiN gate i-InGaP/n-InGaAs/i-GaAs heterostructure MESFETs with a BP-LDD structure were developed for application to microwave and millimeter-wave communication systems. Owing to the use of tilted-angle n+-ion-implantation, symmetric and asymmetric structures FETs can be fabricated on the same chip and low noise, high breakdown voltage, and high power gain can be attained simultaneously. The fabricated symmetric FETs, with a gate length of 0. 13 µm, exhibit a current cutoff frequency of more than 70 GHz and a minimum noise figure as low as 1. 0 dB at 20 GHz, while the gate-drain breakdown voltage is more than 8 V and the MSG is as high as 7. 8 dB at 60 GHz in the asymmetric FETs on the same chip. V-band MMIC amplifiers fabricated using symmetric FETs exhibit a gain of more than 9 dB and a noise figure of 6 dB over the 50 to 60 GHz frequency range.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - Symmetric and Asymmetric InGaP/InGaAs/GaAs Heterostructure MESFETs and Their Application to V-Band Amplifiers
T2 - IEICE TRANSACTIONS on Electronics
SP - 868
EP - 875
AU - Kiyomitsu ONODERA
AU - Kazumi NISHIMURA
AU - Takumi NITTONO
AU - Yasuro YAMANE
AU - Kimiyoshi YAMASAKI
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E81-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1998
AB - Self-aligned T-shaped Au/WSiN gate i-InGaP/n-InGaAs/i-GaAs heterostructure MESFETs with a BP-LDD structure were developed for application to microwave and millimeter-wave communication systems. Owing to the use of tilted-angle n+-ion-implantation, symmetric and asymmetric structures FETs can be fabricated on the same chip and low noise, high breakdown voltage, and high power gain can be attained simultaneously. The fabricated symmetric FETs, with a gate length of 0. 13 µm, exhibit a current cutoff frequency of more than 70 GHz and a minimum noise figure as low as 1. 0 dB at 20 GHz, while the gate-drain breakdown voltage is more than 8 V and the MSG is as high as 7. 8 dB at 60 GHz in the asymmetric FETs on the same chip. V-band MMIC amplifiers fabricated using symmetric FETs exhibit a gain of more than 9 dB and a noise figure of 6 dB over the 50 to 60 GHz frequency range.
ER -