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Kazumi NISHIMURA Kiyomitsu ONODERA Kou INOUE Masami TOKUMITSU Fumiaki HYUGA Kimiyoshi YAMASAKI
We have developed a planar devic technology consisting of 0.15-µm Au/WSiN-gate GaAs-heterostructure MESFETs (HMESFETs) fabricated by self-aligned ion-implantation. The gate-drain breakdown voltage has been improved to 10 V by using an asymmetric LDD structure, and the maximum oscillation frequency is 190 GHz. Because asymmetric and symmetric FETs can be fabricated simultaneously, this technology is suitable for use in making multi-functional millimeter-wave MMICs.
Kiyomitsu ONODERA Kazumi NISHIMURA Takumi NITTONO Yasuro YAMANE Kimiyoshi YAMASAKI
Self-aligned T-shaped Au/WSiN gate i-InGaP/n-InGaAs/i-GaAs heterostructure MESFETs with a BP-LDD structure were developed for application to microwave and millimeter-wave communication systems. Owing to the use of tilted-angle n+-ion-implantation, symmetric and asymmetric structures FETs can be fabricated on the same chip and low noise, high breakdown voltage, and high power gain can be attained simultaneously. The fabricated symmetric FETs, with a gate length of 0. 13 µm, exhibit a current cutoff frequency of more than 70 GHz and a minimum noise figure as low as 1. 0 dB at 20 GHz, while the gate-drain breakdown voltage is more than 8 V and the MSG is as high as 7. 8 dB at 60 GHz in the asymmetric FETs on the same chip. V-band MMIC amplifiers fabricated using symmetric FETs exhibit a gain of more than 9 dB and a noise figure of 6 dB over the 50 to 60 GHz frequency range.
Masami TOKUMITSU Kazumi NISHIMURA Makoto HIRANO Kimiyoshi YAMASAKI
A 0.1-µm gate-length GaAs MESFET technology is reported. A 48.3-GHz dynamic-frequency divider, and an amplifier with 20-dB gain and 17.5-GHz bandwidth are successfully fabricated by integrating over-100-GHz-cut-off frequency MESFETs using a new lightly-doped drain structure with a buried p-layer (BP-LDD) device structure.