IEICE TRANSACTIONS on Electronics
A CMOS DC Voltage Doubler with Nonoverlapping Switching Control
Summary :
A new CMOS DC voltage doubler with nonoverlapping switching control is proposed, in order to eliminate the dynamic current loss during switching as well as the threshold voltage drop of the serial switches. The simulated results at 1.5 V show that the maximum power efficiency is improved with about 30%, whereas the efficiency in the low output current region is larger than 5 times compared to the conventional voltage doublers. This proposed CMOS DC voltage doubler can be used as a VPP generator of low voltage DRAM's.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E84-C No.2 pp.274-277
- Publication Date
- 2001/02/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- LETTER
- Category
- Electronic Circuits
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Shi-Ho KIM, Jorgo TSOUHLARAKIS, Jan Van HOUDT, Herman MAES, "A CMOS DC Voltage Doubler with Nonoverlapping Switching Control" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 2, pp. 274-277, February 2001, doi: .
Abstract: A new CMOS DC voltage doubler with nonoverlapping switching control is proposed, in order to eliminate the dynamic current loss during switching as well as the threshold voltage drop of the serial switches. The simulated results at 1.5 V show that the maximum power efficiency is improved with about 30%, whereas the efficiency in the low output current region is larger than 5 times compared to the conventional voltage doublers. This proposed CMOS DC voltage doubler can be used as a VPP generator of low voltage DRAM's.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_2_274/_p
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@ARTICLE{e84-c_2_274,
author={Shi-Ho KIM, Jorgo TSOUHLARAKIS, Jan Van HOUDT, Herman MAES, },
journal={IEICE TRANSACTIONS on Electronics},
title={A CMOS DC Voltage Doubler with Nonoverlapping Switching Control},
year={2001},
volume={E84-C},
number={2},
pages={274-277},
abstract={A new CMOS DC voltage doubler with nonoverlapping switching control is proposed, in order to eliminate the dynamic current loss during switching as well as the threshold voltage drop of the serial switches. The simulated results at 1.5 V show that the maximum power efficiency is improved with about 30%, whereas the efficiency in the low output current region is larger than 5 times compared to the conventional voltage doublers. This proposed CMOS DC voltage doubler can be used as a VPP generator of low voltage DRAM's.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - A CMOS DC Voltage Doubler with Nonoverlapping Switching Control
T2 - IEICE TRANSACTIONS on Electronics
SP - 274
EP - 277
AU - Shi-Ho KIM
AU - Jorgo TSOUHLARAKIS
AU - Jan Van HOUDT
AU - Herman MAES
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2001
AB - A new CMOS DC voltage doubler with nonoverlapping switching control is proposed, in order to eliminate the dynamic current loss during switching as well as the threshold voltage drop of the serial switches. The simulated results at 1.5 V show that the maximum power efficiency is improved with about 30%, whereas the efficiency in the low output current region is larger than 5 times compared to the conventional voltage doublers. This proposed CMOS DC voltage doubler can be used as a VPP generator of low voltage DRAM's.
ER -
English
