Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems
Summary :
This paper presents an efficient method for estimating maximum simultaneous switching noise (SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use α-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E84-C No.3 pp.376-381
- Publication Date
- 2001/03/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Electronic Components
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Jong-Humn BAEK, Seok-Yoon KIM, "Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 3, pp. 376-381, March 2001, doi: .
Abstract: This paper presents an efficient method for estimating maximum simultaneous switching noise (SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use α-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_3_376/_p
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@ARTICLE{e84-c_3_376,
author={Jong-Humn BAEK, Seok-Yoon KIM, },
journal={IEICE TRANSACTIONS on Electronics},
title={Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems},
year={2001},
volume={E84-C},
number={3},
pages={376-381},
abstract={This paper presents an efficient method for estimating maximum simultaneous switching noise (SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use α-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions.},
keywords={},
doi={},
ISSN={},
month={March},}
Copy
TY - JOUR
TI - Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems
T2 - IEICE TRANSACTIONS on Electronics
SP - 376
EP - 381
AU - Jong-Humn BAEK
AU - Seok-Yoon KIM
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2001
AB - This paper presents an efficient method for estimating maximum simultaneous switching noise (SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use α-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions.
ER -
English
