A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits
Summary :
To transfer a small number, we inherently need a small number of bits. However all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bit. In this paper, we propose a power reduction scheme for data buses using active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate up to 54.2% switching activity reduction.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E87-C No.4 pp.598-605
- Publication Date
- 2004/04/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
- Category
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Masanori MUROYAMA, Akihiko HYODO, Takanori OKUMA, Hiroto YASUURA, "A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits" in IEICE TRANSACTIONS on Electronics,
vol. E87-C, no. 4, pp. 598-605, April 2004, doi: .
Abstract: To transfer a small number, we inherently need a small number of bits. However all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bit. In this paper, we propose a power reduction scheme for data buses using active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate up to 54.2% switching activity reduction.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e87-c_4_598/_p
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@ARTICLE{e87-c_4_598,
author={Masanori MUROYAMA, Akihiko HYODO, Takanori OKUMA, Hiroto YASUURA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits},
year={2004},
volume={E87-C},
number={4},
pages={598-605},
abstract={To transfer a small number, we inherently need a small number of bits. However all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bit. In this paper, we propose a power reduction scheme for data buses using active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate up to 54.2% switching activity reduction.},
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits
T2 - IEICE TRANSACTIONS on Electronics
SP - 598
EP - 605
AU - Masanori MUROYAMA
AU - Akihiko HYODO
AU - Takanori OKUMA
AU - Hiroto YASUURA
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E87-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2004
AB - To transfer a small number, we inherently need a small number of bits. However all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bit. In this paper, we propose a power reduction scheme for data buses using active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate up to 54.2% switching activity reduction.
ER -
English
