IEICE TRANSACTIONS on Electronics
Efficient and Precise Profiling, Modeling and Management on Power and Performance for Power Constrained HPC Systems
Summary :
Due to the slowdown of Moore's Law, power limitation has been one of the most critical issues for current and future HPC systems. To more efficiently utilize HPC systems when power budgets or deadlines are given, it is very desirable to accurately estimate the performance or power consumption of applications before conducting their tuned production runs on any specific systems. In order to ease such estimations, we showcase a straight-forward and yet effective method, based on the enhanced power management framework and DSL we developed, to help HPC users to clarify the performance and power relationships of their applications. This method demonstrates an easy process of profiling, modeling and management on both performance and power of HPC systems and applications. In our evaluations, only a few (up to 3) profiled runs are necessary before very precise models of HPC applications can be obtained through this method (and algorithm), which has dramatically improved the efficiency of and lowered the difficulty in utilizing HPC systems under limited power budgets.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E104-C No.6 pp.237-246
- Publication Date
- 2021/06/01
- Publicized
- 2020/12/01
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.2020LHP0005
- Type of Manuscript
- Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
- Category
Authors
Yuan HE
Shenyang University of Technology,The University of Tokyo
Yasutaka WADA
Meisei University
Wenchao LUO
Shenyang University of Technology
Ryuichi SAKAMOTO
The University of Tokyo
Guanqin PAN
Guangxi University
Thang CAO
MITECH Corporation
Masaaki KONDO
The University of Tokyo,RIKEN
Keyword
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Yuan HE, Yasutaka WADA, Wenchao LUO, Ryuichi SAKAMOTO, Guanqin PAN, Thang CAO, Masaaki KONDO, "Efficient and Precise Profiling, Modeling and Management on Power and Performance for Power Constrained HPC Systems" in IEICE TRANSACTIONS on Electronics,
vol. E104-C, no. 6, pp. 237-246, June 2021, doi: 10.1587/transele.2020LHP0005.
Abstract: Due to the slowdown of Moore's Law, power limitation has been one of the most critical issues for current and future HPC systems. To more efficiently utilize HPC systems when power budgets or deadlines are given, it is very desirable to accurately estimate the performance or power consumption of applications before conducting their tuned production runs on any specific systems. In order to ease such estimations, we showcase a straight-forward and yet effective method, based on the enhanced power management framework and DSL we developed, to help HPC users to clarify the performance and power relationships of their applications. This method demonstrates an easy process of profiling, modeling and management on both performance and power of HPC systems and applications. In our evaluations, only a few (up to 3) profiled runs are necessary before very precise models of HPC applications can be obtained through this method (and algorithm), which has dramatically improved the efficiency of and lowered the difficulty in utilizing HPC systems under limited power budgets.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2020LHP0005/_p
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@ARTICLE{e104-c_6_237,
author={Yuan HE, Yasutaka WADA, Wenchao LUO, Ryuichi SAKAMOTO, Guanqin PAN, Thang CAO, Masaaki KONDO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Efficient and Precise Profiling, Modeling and Management on Power and Performance for Power Constrained HPC Systems},
year={2021},
volume={E104-C},
number={6},
pages={237-246},
abstract={Due to the slowdown of Moore's Law, power limitation has been one of the most critical issues for current and future HPC systems. To more efficiently utilize HPC systems when power budgets or deadlines are given, it is very desirable to accurately estimate the performance or power consumption of applications before conducting their tuned production runs on any specific systems. In order to ease such estimations, we showcase a straight-forward and yet effective method, based on the enhanced power management framework and DSL we developed, to help HPC users to clarify the performance and power relationships of their applications. This method demonstrates an easy process of profiling, modeling and management on both performance and power of HPC systems and applications. In our evaluations, only a few (up to 3) profiled runs are necessary before very precise models of HPC applications can be obtained through this method (and algorithm), which has dramatically improved the efficiency of and lowered the difficulty in utilizing HPC systems under limited power budgets.},
keywords={},
doi={10.1587/transele.2020LHP0005},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - Efficient and Precise Profiling, Modeling and Management on Power and Performance for Power Constrained HPC Systems
T2 - IEICE TRANSACTIONS on Electronics
SP - 237
EP - 246
AU - Yuan HE
AU - Yasutaka WADA
AU - Wenchao LUO
AU - Ryuichi SAKAMOTO
AU - Guanqin PAN
AU - Thang CAO
AU - Masaaki KONDO
PY - 2021
DO - 10.1587/transele.2020LHP0005
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E104-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2021
AB - Due to the slowdown of Moore's Law, power limitation has been one of the most critical issues for current and future HPC systems. To more efficiently utilize HPC systems when power budgets or deadlines are given, it is very desirable to accurately estimate the performance or power consumption of applications before conducting their tuned production runs on any specific systems. In order to ease such estimations, we showcase a straight-forward and yet effective method, based on the enhanced power management framework and DSL we developed, to help HPC users to clarify the performance and power relationships of their applications. This method demonstrates an easy process of profiling, modeling and management on both performance and power of HPC systems and applications. In our evaluations, only a few (up to 3) profiled runs are necessary before very precise models of HPC applications can be obtained through this method (and algorithm), which has dramatically improved the efficiency of and lowered the difficulty in utilizing HPC systems under limited power budgets.
ER -
English
