We have proposed and demonstrated a device fabrication process of physically defined quantum dots utilizing electron beam lithography employing a negative-tone resist toward high-density integration of silicon quantum bits (qubits). The electrical characterization at 3.8K exhibited so-called Coulomb diamonds, which indicates successful device operation as single-electron transistors. The proposed device fabrication process will be useful due to its high compatibility with the large-scale integration process.
Shimpei NISHIYAMA
Tokyo Institute of Technology,National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba
Kimihiko KATO
National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba
Yongxun LIU
National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba
Raisei MIZOKUCHI
Tokyo Institute of Technology
Jun YONEDA
Tokyo Institute of Technology
Tetsuo KODERA
Tokyo Institute of Technology
Takahiro MORI
National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba
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Shimpei NISHIYAMA, Kimihiko KATO, Yongxun LIU, Raisei MIZOKUCHI, Jun YONEDA, Tetsuo KODERA, Takahiro MORI, "Single-Electron Transistor Operation of a Physically Defined Silicon Quantum Dot Device Fabricated by Electron Beam Lithography Employing a Negative-Tone Resist" in IEICE TRANSACTIONS on Electronics,
vol. E106-C, no. 10, pp. 592-596, October 2023, doi: 10.1587/transele.2022FUS0002.
Abstract: We have proposed and demonstrated a device fabrication process of physically defined quantum dots utilizing electron beam lithography employing a negative-tone resist toward high-density integration of silicon quantum bits (qubits). The electrical characterization at 3.8K exhibited so-called Coulomb diamonds, which indicates successful device operation as single-electron transistors. The proposed device fabrication process will be useful due to its high compatibility with the large-scale integration process.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2022FUS0002/_p
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@ARTICLE{e106-c_10_592,
author={Shimpei NISHIYAMA, Kimihiko KATO, Yongxun LIU, Raisei MIZOKUCHI, Jun YONEDA, Tetsuo KODERA, Takahiro MORI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Single-Electron Transistor Operation of a Physically Defined Silicon Quantum Dot Device Fabricated by Electron Beam Lithography Employing a Negative-Tone Resist},
year={2023},
volume={E106-C},
number={10},
pages={592-596},
abstract={We have proposed and demonstrated a device fabrication process of physically defined quantum dots utilizing electron beam lithography employing a negative-tone resist toward high-density integration of silicon quantum bits (qubits). The electrical characterization at 3.8K exhibited so-called Coulomb diamonds, which indicates successful device operation as single-electron transistors. The proposed device fabrication process will be useful due to its high compatibility with the large-scale integration process.},
keywords={},
doi={10.1587/transele.2022FUS0002},
ISSN={1745-1353},
month={October},}
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TY - JOUR
TI - Single-Electron Transistor Operation of a Physically Defined Silicon Quantum Dot Device Fabricated by Electron Beam Lithography Employing a Negative-Tone Resist
T2 - IEICE TRANSACTIONS on Electronics
SP - 592
EP - 596
AU - Shimpei NISHIYAMA
AU - Kimihiko KATO
AU - Yongxun LIU
AU - Raisei MIZOKUCHI
AU - Jun YONEDA
AU - Tetsuo KODERA
AU - Takahiro MORI
PY - 2023
DO - 10.1587/transele.2022FUS0002
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E106-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2023
AB - We have proposed and demonstrated a device fabrication process of physically defined quantum dots utilizing electron beam lithography employing a negative-tone resist toward high-density integration of silicon quantum bits (qubits). The electrical characterization at 3.8K exhibited so-called Coulomb diamonds, which indicates successful device operation as single-electron transistors. The proposed device fabrication process will be useful due to its high compatibility with the large-scale integration process.
ER -