3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array
Summary :
We propose a 3-dimensional terraced NAND flash memory. It has a vertical channel so it is possible to make a long enough channel in 1F2 size. And it has 3-dimensional structure whose channel is connected vertically along with two stairs. So we can obtain high density as in the stacked array structure, without silicon stacking process. We can make NAND flash memory with 3F2 cell size. Using SILVACO ATLAS simulation, we study terraced NAND flash memory characteristics such as program, erase, and read. Also, its fabrication method is proposed.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E92-C No.5 pp.653-658
- Publication Date
- 2009/05/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E92.C.653
- Type of Manuscript
- Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
- Category
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Yoon KIM, Seongjae CHO, Gil Sung LEE, Il Han PARK, Jong Duk LEE, Hyungcheol SHIN, Byung-Gook PARK, "3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array" in IEICE TRANSACTIONS on Electronics,
vol. E92-C, no. 5, pp. 653-658, May 2009, doi: 10.1587/transele.E92.C.653.
Abstract: We propose a 3-dimensional terraced NAND flash memory. It has a vertical channel so it is possible to make a long enough channel in 1F2 size. And it has 3-dimensional structure whose channel is connected vertically along with two stairs. So we can obtain high density as in the stacked array structure, without silicon stacking process. We can make NAND flash memory with 3F2 cell size. Using SILVACO ATLAS simulation, we study terraced NAND flash memory characteristics such as program, erase, and read. Also, its fabrication method is proposed.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.653/_p
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@ARTICLE{e92-c_5_653,
author={Yoon KIM, Seongjae CHO, Gil Sung LEE, Il Han PARK, Jong Duk LEE, Hyungcheol SHIN, Byung-Gook PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array},
year={2009},
volume={E92-C},
number={5},
pages={653-658},
abstract={We propose a 3-dimensional terraced NAND flash memory. It has a vertical channel so it is possible to make a long enough channel in 1F2 size. And it has 3-dimensional structure whose channel is connected vertically along with two stairs. So we can obtain high density as in the stacked array structure, without silicon stacking process. We can make NAND flash memory with 3F2 cell size. Using SILVACO ATLAS simulation, we study terraced NAND flash memory characteristics such as program, erase, and read. Also, its fabrication method is proposed.},
keywords={},
doi={10.1587/transele.E92.C.653},
ISSN={1745-1353},
month={May},}
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TY - JOUR
TI - 3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array
T2 - IEICE TRANSACTIONS on Electronics
SP - 653
EP - 658
AU - Yoon KIM
AU - Seongjae CHO
AU - Gil Sung LEE
AU - Il Han PARK
AU - Jong Duk LEE
AU - Hyungcheol SHIN
AU - Byung-Gook PARK
PY - 2009
DO - 10.1587/transele.E92.C.653
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2009
AB - We propose a 3-dimensional terraced NAND flash memory. It has a vertical channel so it is possible to make a long enough channel in 1F2 size. And it has 3-dimensional structure whose channel is connected vertically along with two stairs. So we can obtain high density as in the stacked array structure, without silicon stacking process. We can make NAND flash memory with 3F2 cell size. Using SILVACO ATLAS simulation, we study terraced NAND flash memory characteristics such as program, erase, and read. Also, its fabrication method is proposed.
ER -
English
