A low-voltage quadrature up-conversion CMOS mixer for 5-GHz wireless communication applications is designed with a TSMC 0.18-µm process. The fold-switching technique is used to implement the low-voltage double balanced quadrature mixer. A miniature lumped-element microwave broadband rat-race hybrid and RLC shift network are used for the local oscillator and the intermediate frequency port design, respectively. The measured results demonstrate that the mixer can reach a high conversion gain, a low noise figure (NF), and a high linearity. The mixer exhibits improvement in noise, conversion gain, and image rejection. The mixer shows a conversion gain of 16 dB, a noise figure of 12.8 dB, an image rejection of 45 dB, while dissipating 15.5 mW for an operating voltage at 1 V.
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Wan-Rone LIOU, Mei-Ling YEH, Sheng-Hing KUO, Yao-Chain LIN, "A Low-Voltage High-Gain Quadrature Up-Conversion 5 GHz CMOS RF Mixer" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 5, pp. 662-669, May 2010, doi: 10.1587/transele.E93.C.662.
Abstract: A low-voltage quadrature up-conversion CMOS mixer for 5-GHz wireless communication applications is designed with a TSMC 0.18-µm process. The fold-switching technique is used to implement the low-voltage double balanced quadrature mixer. A miniature lumped-element microwave broadband rat-race hybrid and RLC shift network are used for the local oscillator and the intermediate frequency port design, respectively. The measured results demonstrate that the mixer can reach a high conversion gain, a low noise figure (NF), and a high linearity. The mixer exhibits improvement in noise, conversion gain, and image rejection. The mixer shows a conversion gain of 16 dB, a noise figure of 12.8 dB, an image rejection of 45 dB, while dissipating 15.5 mW for an operating voltage at 1 V.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.662/_p
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@ARTICLE{e93-c_5_662,
author={Wan-Rone LIOU, Mei-Ling YEH, Sheng-Hing KUO, Yao-Chain LIN, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Low-Voltage High-Gain Quadrature Up-Conversion 5 GHz CMOS RF Mixer},
year={2010},
volume={E93-C},
number={5},
pages={662-669},
abstract={A low-voltage quadrature up-conversion CMOS mixer for 5-GHz wireless communication applications is designed with a TSMC 0.18-µm process. The fold-switching technique is used to implement the low-voltage double balanced quadrature mixer. A miniature lumped-element microwave broadband rat-race hybrid and RLC shift network are used for the local oscillator and the intermediate frequency port design, respectively. The measured results demonstrate that the mixer can reach a high conversion gain, a low noise figure (NF), and a high linearity. The mixer exhibits improvement in noise, conversion gain, and image rejection. The mixer shows a conversion gain of 16 dB, a noise figure of 12.8 dB, an image rejection of 45 dB, while dissipating 15.5 mW for an operating voltage at 1 V.},
keywords={},
doi={10.1587/transele.E93.C.662},
ISSN={1745-1353},
month={May},}
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TY - JOUR
TI - A Low-Voltage High-Gain Quadrature Up-Conversion 5 GHz CMOS RF Mixer
T2 - IEICE TRANSACTIONS on Electronics
SP - 662
EP - 669
AU - Wan-Rone LIOU
AU - Mei-Ling YEH
AU - Sheng-Hing KUO
AU - Yao-Chain LIN
PY - 2010
DO - 10.1587/transele.E93.C.662
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2010
AB - A low-voltage quadrature up-conversion CMOS mixer for 5-GHz wireless communication applications is designed with a TSMC 0.18-µm process. The fold-switching technique is used to implement the low-voltage double balanced quadrature mixer. A miniature lumped-element microwave broadband rat-race hybrid and RLC shift network are used for the local oscillator and the intermediate frequency port design, respectively. The measured results demonstrate that the mixer can reach a high conversion gain, a low noise figure (NF), and a high linearity. The mixer exhibits improvement in noise, conversion gain, and image rejection. The mixer shows a conversion gain of 16 dB, a noise figure of 12.8 dB, an image rejection of 45 dB, while dissipating 15.5 mW for an operating voltage at 1 V.
ER -